This commit is contained in:
NikolajDanger
2022-06-08 14:31:43 +02:00
parent e46e002e9f
commit 305725a986
18 changed files with 2672 additions and 3223 deletions

View File

@ -17,319 +17,197 @@
_stop_:
ori $2, $0, 10
syscall
# Function plus5
plus5:
sw $31, -4($29)
addi $29, $29, -8
# ori _param_x_1_,$2,0
# ori _plus_L_3_,_param_x_1_,0
ori $3, $0, 5
# was: ori _plus_R_4_, $0, 5
add $2, $2, $3
# was: add _plus5res_2_, _plus_L_3_, _plus_R_4_
# ori $2,_plus5res_2_,0
addi $29, $29, 8
lw $31, -4($29)
jr $31
# Function mul2
mul2:
sw $31, -4($29)
addi $29, $29, -8
# ori _param_x_5_,$2,0
ori $3, $2, 0
# was: ori _plus_L_7_, _param_x_5_, 0
# ori _plus_R_8_,_param_x_5_,0
add $2, $3, $2
# was: add _mul2res_6_, _plus_L_7_, _plus_R_8_
# ori $2,_mul2res_6_,0
addi $29, $29, 8
lw $31, -4($29)
jr $31
# Function testcomp
testcomp:
sw $31, -4($29)
addi $29, $29, -8
# ori _param_x_9_,$2,0
# ori _arg_12_,_param_x_9_,0
# ori $2,_arg_12_,0
jal write_int_arr
# was: jal write_int_arr, $2
# ori _arg_11_,$2,0
# ori $2,_arg_11_,0
jal write_int_arr
# was: jal write_int_arr, $2
# ori _testcompres_10_,$2,0
# ori $2,_testcompres_10_,0
addi $29, $29, 8
lw $31, -4($29)
jr $31
# Function write_int
write_int:
sw $31, -4($29)
sw $16, -8($29)
addi $29, $29, -12
# ori _param_x_13_,$2,0
ori $16, $2, 0
# was: ori _tmp_15_, _param_x_13_, 0
# ori _write_intres_14_,_tmp_15_,0
ori $2, $16, 0
# was: ori $2, _write_intres_14_, 0
jal putint
# was: jal putint, $2
ori $2, $16, 0
# was: ori $2, _write_intres_14_, 0
addi $29, $29, 12
lw $16, -8($29)
lw $31, -4($29)
jr $31
# Function write_int_arr
write_int_arr:
sw $31, -4($29)
sw $20, -24($29)
sw $19, -20($29)
sw $18, -16($29)
sw $17, -12($29)
sw $16, -8($29)
addi $29, $29, -28
# ori _param_x_16_,$2,0
# map
# ori _arr_reg_19_,_param_x_16_,0
lw $16, 0($2)
# was: lw _size_reg_18_, 0(_arr_reg_19_)
# dynalloc
ori $17, $28, 0
# was: ori _write_int_arrres_17_, $28, 0
sll $3, $16, 2
# was: sll _tmp_28_, _size_reg_18_, 2
addi $3, $3, 4
# was: addi _tmp_28_, _tmp_28_, 4
add $28, $28, $3
# was: add $28, $28, _tmp_28_
sw $16, 0($17)
# was: sw _size_reg_18_, 0(_write_int_arrres_17_)
addi $18, $17, 4
# was: addi _addr_reg_22_, _write_int_arrres_17_, 4
ori $19, $0, 0
# was: ori _i_reg_23_, $0, 0
addi $20, $2, 4
# was: addi _elem_reg_20_, _arr_reg_19_, 4
_loop_beg_24_:
sub $2, $19, $16
# was: sub _tmp_reg_26_, _i_reg_23_, _size_reg_18_
bgez $2, _loop_end_25_
# was: bgez _tmp_reg_26_, _loop_end_25_
lw $2, 0($20)
# was: lw _res_reg_21_, 0(_elem_reg_20_)
addi $20, $20, 4
# was: addi _elem_reg_20_, _elem_reg_20_, 4
# ori $2,_res_reg_21_,0
jal write_int
# was: jal write_int, $2
# ori _tmp_reg_27_,$2,0
# ori _res_reg_21_,_tmp_reg_27_,0
sw $2, 0($18)
# was: sw _res_reg_21_, 0(_addr_reg_22_)
addi $18, $18, 4
# was: addi _addr_reg_22_, _addr_reg_22_, 4
addi $19, $19, 1
# was: addi _i_reg_23_, _i_reg_23_, 1
j _loop_beg_24_
_loop_end_25_:
ori $2, $17, 0
# was: ori $2, _write_int_arrres_17_, 0
addi $29, $29, 28
lw $20, -24($29)
lw $19, -20($29)
lw $18, -16($29)
lw $17, -12($29)
lw $16, -8($29)
lw $31, -4($29)
jr $31
# Function boo
boo:
sw $31, -4($29)
sw $20, -24($29)
sw $19, -20($29)
sw $18, -16($29)
sw $17, -12($29)
sw $16, -8($29)
addi $29, $29, -28
# ori _param_a_29_,$2,0
ori $0, $0, 8
# was: ori _letBind_32_, $0, 8
# map
# ori _arr_reg_34_,_param_a_29_,0
lw $17, 0($2)
# was: lw _size_reg_33_, 0(_arr_reg_34_)
# dynalloc
ori $16, $28, 0
# was: ori _letBind_31_, $28, 0
sll $3, $17, 2
# was: sll _tmp_43_, _size_reg_33_, 2
addi $3, $3, 4
# was: addi _tmp_43_, _tmp_43_, 4
add $28, $28, $3
# was: add $28, $28, _tmp_43_
sw $17, 0($16)
# was: sw _size_reg_33_, 0(_letBind_31_)
addi $18, $16, 4
# was: addi _addr_reg_37_, _letBind_31_, 4
ori $19, $0, 0
# was: ori _i_reg_38_, $0, 0
addi $20, $2, 4
# was: addi _elem_reg_35_, _arr_reg_34_, 4
_loop_beg_39_:
sub $2, $19, $17
# was: sub _tmp_reg_41_, _i_reg_38_, _size_reg_33_
bgez $2, _loop_end_40_
# was: bgez _tmp_reg_41_, _loop_end_40_
lw $2, 0($20)
# was: lw _res_reg_36_, 0(_elem_reg_35_)
addi $20, $20, 4
# was: addi _elem_reg_35_, _elem_reg_35_, 4
# ori $2,_res_reg_36_,0
jal plus5
# was: jal plus5, $2
# ori _tmp_reg_42_,$2,0
# ori _res_reg_36_,_tmp_reg_42_,0
sw $2, 0($18)
# was: sw _res_reg_36_, 0(_addr_reg_37_)
addi $18, $18, 4
# was: addi _addr_reg_37_, _addr_reg_37_, 4
addi $19, $19, 1
# was: addi _i_reg_38_, _i_reg_38_, 1
j _loop_beg_39_
_loop_end_40_:
ori $2, $16, 0
# was: ori _boores_30_, _letBind_31_, 0
# ori $2,_boores_30_,0
addi $29, $29, 28
lw $20, -24($29)
lw $19, -20($29)
lw $18, -16($29)
lw $17, -12($29)
lw $16, -8($29)
lw $31, -4($29)
jr $31
# Function main
main:
sw $31, -4($29)
sw $21, -28($29)
sw $20, -24($29)
sw $19, -20($29)
sw $18, -16($29)
sw $17, -12($29)
sw $16, -8($29)
addi $29, $29, -28
addi $29, $29, -32
jal getint
# was: jal getint, $2
ori $3, $2, 0
# was: ori _letBind_45_, $2, 0
# ori _size_reg_47_,_letBind_45_,0
bgez $3, _safe_lab_48_
# was: bgez _size_reg_47_, _safe_lab_48_
# ori _letBind_2_,$2,0
# ori _size_reg_4_,_letBind_2_,0
bgez $2, _safe_lab_5_
# was: bgez _size_reg_4_, _safe_lab_5_
ori $5, $0, 15
# was: ori $5, $0, 15
la $6, _Msg_IllegalArraySize_
# was: la $6, _Msg_IllegalArraySize_
j _RuntimeError_
_safe_lab_48_:
_safe_lab_5_:
# dynalloc
ori $2, $28, 0
# was: ori _letBind_46_, $28, 0
sll $4, $3, 2
# was: sll _tmp_54_, _size_reg_47_, 2
ori $3, $28, 0
# was: ori _letBind_3_, $28, 0
sll $4, $2, 2
# was: sll _tmp_11_, _size_reg_4_, 2
addi $4, $4, 4
# was: addi _tmp_54_, _tmp_54_, 4
# was: addi _tmp_11_, _tmp_11_, 4
add $28, $28, $4
# was: add $28, $28, _tmp_54_
sw $3, 0($2)
# was: sw _size_reg_47_, 0(_letBind_46_)
addi $5, $2, 4
# was: addi _addr_reg_49_, _letBind_46_, 4
ori $6, $0, 0
# was: ori _i_reg_50_, $0, 0
_loop_beg_51_:
sub $4, $6, $3
# was: sub _tmp_reg_53_, _i_reg_50_, _size_reg_47_
bgez $4, _loop_end_52_
# was: bgez _tmp_reg_53_, _loop_end_52_
sw $6, 0($5)
# was: sw _i_reg_50_, 0(_addr_reg_49_)
# was: add $28, $28, _tmp_11_
sw $2, 0($3)
# was: sw _size_reg_4_, 0(_letBind_3_)
addi $5, $3, 4
# was: addi _addr_reg_6_, _letBind_3_, 4
ori $4, $0, 0
# was: ori _i_reg_7_, $0, 0
_loop_beg_8_:
sub $6, $4, $2
# was: sub _tmp_reg_10_, _i_reg_7_, _size_reg_4_
bgez $6, _loop_end_9_
# was: bgez _tmp_reg_10_, _loop_end_9_
sw $4, 0($5)
# was: sw _i_reg_7_, 0(_addr_reg_6_)
addi $5, $5, 4
# was: addi _addr_reg_49_, _addr_reg_49_, 4
addi $6, $6, 1
# was: addi _i_reg_50_, _i_reg_50_, 1
j _loop_beg_51_
_loop_end_52_:
# ori _plus_L_57_,_letBind_45_,0
ori $4, $3, 0
# was: ori _plus_R_58_, _letBind_45_, 0
add $0, $3, $4
# was: add _letBind_56_, _plus_L_57_, _plus_R_58_
ori $4, $3, 0
# was: ori _plus_L_61_, _letBind_45_, 0
# ori _plus_R_62_,_letBind_45_,0
add $4, $4, $3
# was: add _plus_L_59_, _plus_L_61_, _plus_R_62_
# ori _plus_R_60_,_letBind_45_,0
add $0, $4, $3
# was: add _letBind_55_, _plus_L_59_, _plus_R_60_
# ori _arg_64_,_letBind_46_,0
# ori $2,_arg_64_,0
jal boo
# was: jal boo, $2
# ori _letBind_63_,$2,0
# was: addi _addr_reg_6_, _addr_reg_6_, 4
addi $4, $4, 1
# was: addi _i_reg_7_, _i_reg_7_, 1
j _loop_beg_8_
_loop_end_9_:
# map
# ori _arr_reg_67_,_letBind_63_,0
lw $16, 0($2)
# was: lw _size_reg_66_, 0(_arr_reg_67_)
ori $2, $3, 0
# was: ori _arr_reg_15_, _letBind_3_, 0
lw $4, 0($2)
# was: lw _size_reg_14_, 0(_arr_reg_15_)
# dynalloc
ori $17, $28, 0
# was: ori _letBind_65_, $28, 0
sll $3, $16, 2
# was: sll _tmp_76_, _size_reg_66_, 2
ori $6, $28, 0
# was: ori _letBind_13_, $28, 0
sll $3, $4, 2
# was: sll _tmp_26_, _size_reg_14_, 2
addi $3, $3, 4
# was: addi _tmp_76_, _tmp_76_, 4
# was: addi _tmp_26_, _tmp_26_, 4
add $28, $28, $3
# was: add $28, $28, _tmp_76_
sw $16, 0($17)
# was: sw _size_reg_66_, 0(_letBind_65_)
addi $18, $17, 4
# was: addi _addr_reg_70_, _letBind_65_, 4
# was: add $28, $28, _tmp_26_
sw $4, 0($6)
# was: sw _size_reg_14_, 0(_letBind_13_)
addi $3, $6, 4
# was: addi _addr_reg_18_, _letBind_13_, 4
ori $5, $0, 0
# was: ori _i_reg_19_, $0, 0
addi $7, $2, 4
# was: addi _elem_reg_16_, _arr_reg_15_, 4
_loop_beg_20_:
sub $2, $5, $4
# was: sub _tmp_reg_22_, _i_reg_19_, _size_reg_14_
bgez $2, _loop_end_21_
# was: bgez _tmp_reg_22_, _loop_end_21_
lw $2, 0($7)
# was: lw _res_reg_17_, 0(_elem_reg_16_)
addi $7, $7, 4
# was: addi _elem_reg_16_, _elem_reg_16_, 4
ori $8, $2, 0
# was: ori _plus_L_24_, _res_reg_17_, 0
ori $2, $0, 5
# was: ori _plus_R_25_, $0, 5
add $2, $8, $2
# was: add _fun_arg_res_23_, _plus_L_24_, _plus_R_25_
# ori _res_reg_17_,_fun_arg_res_23_,0
sw $2, 0($3)
# was: sw _res_reg_17_, 0(_addr_reg_18_)
addi $3, $3, 4
# was: addi _addr_reg_18_, _addr_reg_18_, 4
addi $5, $5, 1
# was: addi _i_reg_19_, _i_reg_19_, 1
j _loop_beg_20_
_loop_end_21_:
ori $2, $6, 0
# was: ori _letBind_12_, _letBind_13_, 0
# map
# ori _arr_reg_29_,_letBind_12_,0
lw $4, 0($2)
# was: lw _size_reg_28_, 0(_arr_reg_29_)
# dynalloc
ori $5, $28, 0
# was: ori _letBind_27_, $28, 0
sll $3, $4, 2
# was: sll _tmp_40_, _size_reg_28_, 2
addi $3, $3, 4
# was: addi _tmp_40_, _tmp_40_, 4
add $28, $28, $3
# was: add $28, $28, _tmp_40_
sw $4, 0($5)
# was: sw _size_reg_28_, 0(_letBind_27_)
addi $3, $5, 4
# was: addi _addr_reg_32_, _letBind_27_, 4
ori $6, $0, 0
# was: ori _i_reg_33_, $0, 0
addi $7, $2, 4
# was: addi _elem_reg_30_, _arr_reg_29_, 4
_loop_beg_34_:
sub $2, $6, $4
# was: sub _tmp_reg_36_, _i_reg_33_, _size_reg_28_
bgez $2, _loop_end_35_
# was: bgez _tmp_reg_36_, _loop_end_35_
lw $2, 0($7)
# was: lw _res_reg_31_, 0(_elem_reg_30_)
addi $7, $7, 4
# was: addi _elem_reg_30_, _elem_reg_30_, 4
ori $8, $2, 0
# was: ori _plus_L_38_, _res_reg_31_, 0
# ori _plus_R_39_,_res_reg_31_,0
add $2, $8, $2
# was: add _fun_arg_res_37_, _plus_L_38_, _plus_R_39_
# ori _res_reg_31_,_fun_arg_res_37_,0
sw $2, 0($3)
# was: sw _res_reg_31_, 0(_addr_reg_32_)
addi $3, $3, 4
# was: addi _addr_reg_32_, _addr_reg_32_, 4
addi $6, $6, 1
# was: addi _i_reg_33_, _i_reg_33_, 1
j _loop_beg_34_
_loop_end_35_:
# map
# ori _arr_reg_42_,_letBind_27_,0
lw $17, 0($5)
# was: lw _size_reg_41_, 0(_arr_reg_42_)
# dynalloc
ori $16, $28, 0
# was: ori _mainres_1_, $28, 0
sll $2, $17, 2
# was: sll _tmp_52_, _size_reg_41_, 2
addi $2, $2, 4
# was: addi _tmp_52_, _tmp_52_, 4
add $28, $28, $2
# was: add $28, $28, _tmp_52_
sw $17, 0($16)
# was: sw _size_reg_41_, 0(_mainres_1_)
addi $18, $16, 4
# was: addi _addr_reg_45_, _mainres_1_, 4
ori $19, $0, 0
# was: ori _i_reg_71_, $0, 0
addi $20, $2, 4
# was: addi _elem_reg_68_, _arr_reg_67_, 4
_loop_beg_72_:
sub $2, $19, $16
# was: sub _tmp_reg_74_, _i_reg_71_, _size_reg_66_
bgez $2, _loop_end_73_
# was: bgez _tmp_reg_74_, _loop_end_73_
lw $2, 0($20)
# was: lw _res_reg_69_, 0(_elem_reg_68_)
# was: ori _i_reg_46_, $0, 0
addi $20, $5, 4
# was: addi _elem_reg_43_, _arr_reg_42_, 4
_loop_beg_47_:
sub $2, $19, $17
# was: sub _tmp_reg_49_, _i_reg_46_, _size_reg_41_
bgez $2, _loop_end_48_
# was: bgez _tmp_reg_49_, _loop_end_48_
lw $21, 0($20)
# was: lw _res_reg_44_, 0(_elem_reg_43_)
addi $20, $20, 4
# was: addi _elem_reg_68_, _elem_reg_68_, 4
# ori $2,_res_reg_69_,0
jal mul2
# was: jal mul2, $2
# ori _tmp_reg_75_,$2,0
# ori _res_reg_69_,_tmp_reg_75_,0
sw $2, 0($18)
# was: sw _res_reg_69_, 0(_addr_reg_70_)
# was: addi _elem_reg_43_, _elem_reg_43_, 4
# ori _tmp_51_,_res_reg_44_,0
# ori _fun_arg_res_50_,_tmp_51_,0
ori $2, $21, 0
# was: ori $2, _fun_arg_res_50_, 0
jal putint
# was: jal putint, $2
# ori _res_reg_44_,_fun_arg_res_50_,0
sw $21, 0($18)
# was: sw _res_reg_44_, 0(_addr_reg_45_)
addi $18, $18, 4
# was: addi _addr_reg_70_, _addr_reg_70_, 4
# was: addi _addr_reg_45_, _addr_reg_45_, 4
addi $19, $19, 1
# was: addi _i_reg_71_, _i_reg_71_, 1
j _loop_beg_72_
_loop_end_73_:
ori $2, $17, 0
# was: ori _arg_77_, _letBind_65_, 0
# ori $2,_arg_77_,0
jal write_int_arr
# was: jal write_int_arr, $2
# ori _mainres_44_,$2,0
# ori $2,_mainres_44_,0
addi $29, $29, 28
# was: addi _i_reg_46_, _i_reg_46_, 1
j _loop_beg_47_
_loop_end_48_:
ori $2, $16, 0
# was: ori $2, _mainres_1_, 0
addi $29, $29, 32
lw $21, -28($29)
lw $20, -24($29)
lw $19, -20($29)
lw $18, -16($29)