diff --git a/Fasto/DeadBindingRemoval.fs b/Fasto/DeadBindingRemoval.fs
index 4d73ec8..72ba803 100644
--- a/Fasto/DeadBindingRemoval.fs
+++ b/Fasto/DeadBindingRemoval.fs
@@ -62,13 +62,9 @@ let rec removeDeadBindingsInExp (e : TypedExp) : (bool * DBRtab * TypedExp) =
              ArrayLit (es', t, pos) )
         (* ToDO: Task 3: implement the cases of `Var`, `Index` and `Let` expressions below *)
         | Var (name, pos) ->
-            (* Task 3, Hints for the `Var` case:
-                  - 1st element of result tuple: can a variable name contain IO?
-                  - 2nd element of result tuple: you have discovered a name, hence
-                        you need to record it in a new symbol table.
-                  - 3rd element of the tuple: should be the optimised expression.
-            *)
-            failwith "Unimplemented removeDeadBindingsInExp for Var"
+            let symtab = SymTab.empty()
+            let symtab = recordUse name symtab
+            (false, symtab, Var(name, pos))
         | Plus (x, y, pos) ->
             let (xios, xuses, x') = removeDeadBindingsInExp x
             let (yios, yuses, y') = removeDeadBindingsInExp y
@@ -113,12 +109,9 @@ let rec removeDeadBindingsInExp (e : TypedExp) : (bool * DBRtab * TypedExp) =
              List.fold SymTab.combine (SymTab.empty()) uses,
              Apply (fname, args', pos))
         | Index (name, e, t, pos) ->
-            (* Task 3, `Index` case: is similar to the `Var` case, except that,
-                        additionally, you also need to recursively optimize the index
-                        expression `e` and to propagate its results (in addition
-                        to recording the use of `name`).
-            *)
-            failwith "Unimplemented removeDeadBindingsInExp for Index"
+            let (eio, symtab, e') = removeDeadBindingsInExp e
+            let symtab = recordUse name symtab
+            (eio, symtab, Index(name, e', t, pos))
 
         | Let (Dec (name, e, decpos), body, pos) ->
             (* Task 3, Hints for the `Let` case:
@@ -144,7 +137,16 @@ let rec removeDeadBindingsInExp (e : TypedExp) : (bool * DBRtab * TypedExp) =
                     Let-expression.
 
             *)
-            failwith "Unimplemented removeDeadBindingsInExp for Let"
+            let (eio, esymtab, e') = removeDeadBindingsInExp e
+            let (bodyio, bodysymtab, body') = removeDeadBindingsInExp body
+            if ((isUsed name bodysymtab) || eio) then
+                let io = eio || bodyio
+                let symtab = SymTab.combine esymtab bodysymtab
+                let exp = Let (Dec (name, e', decpos), body', pos)
+                (io, symtab, exp)
+            else
+                (bodyio, bodysymtab, body')
+
         | Iota (e, pos) ->
             let (io, uses, e') = removeDeadBindingsInExp e
             (io,
diff --git a/tests/copyConstPropFold0.asm b/tests/copyConstPropFold0.asm
index fa6f634..f0c850b 100644
--- a/tests/copyConstPropFold0.asm
+++ b/tests/copyConstPropFold0.asm
@@ -17,29 +17,6 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function f
-f:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_1_,$2,0
-# 	ori	_param_y_2_,$3,0
-	ori	$4, $2, 0
-# was:	ori	_plus_L_6_, _param_x_1_, 0
-	ori	$2, $0, 2
-# was:	ori	_plus_R_7_, $0, 2
-	add	$2, $4, $2
-# was:	add	_times_L_4_, _plus_L_6_, _plus_R_7_
-# 	ori	_minus_L_8_,_param_y_2_,0
-	ori	$4, $0, 2
-# was:	ori	_minus_R_9_, $0, 2
-	sub	$3, $3, $4
-# was:	sub	_times_R_5_, _minus_L_8_, _minus_R_9_
-	mul	$2, $2, $3
-# was:	mul	_fres_3_, _times_L_4_, _times_R_5_
-# 	ori	$2,_fres_3_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
@@ -47,20 +24,18 @@ main:
 	addi	$29, $29, -12
 	jal	getint
 # was:	jal	getint, $2
-# 	ori	_letBind_11_,$2,0
-# 	ori	_letBind_13_,_letBind_11_,0
-	ori	$0, $0, 2
-# was:	ori	_letBind_14_, $0, 2
-	ori	$16, $0, 0
-# was:	ori	_letBind_12_, $0, 0
-# 	ori	_tmp_15_,_letBind_12_,0
-# 	ori	_mainres_10_,_tmp_15_,0
+# 	ori	_letBind_2_,$2,0
+	ori	$2, $0, 0
+# was:	ori	_letBind_3_, $0, 0
+# 	ori	_tmp_4_,_letBind_3_,0
+	ori	$16, $2, 0
+# was:	ori	_mainres_1_, _tmp_4_, 0
 	ori	$2, $16, 0
-# was:	ori	$2, _mainres_10_, 0
+# was:	ori	$2, _mainres_1_, 0
 	jal	putint
 # was:	jal	putint, $2
 	ori	$2, $16, 0
-# was:	ori	$2, _mainres_10_, 0
+# was:	ori	$2, _mainres_1_, 0
 	addi	$29, $29, 12
 	lw	$16, -8($29)
 	lw	$31, -4($29)
diff --git a/tests/copyConstPropFold1.asm b/tests/copyConstPropFold1.asm
index 28f9cda..2f99fbd 100644
--- a/tests/copyConstPropFold1.asm
+++ b/tests/copyConstPropFold1.asm
@@ -22,75 +22,71 @@ main:
 	sw	$31, -4($29)
 	sw	$16, -8($29)
 	addi	$29, $29, -12
-	ori	$0, $0, 40
-# was:	ori	_letBind_2_, $0, 40
 	ori	$3, $0, 40
-# was:	ori	_size_reg_4_, $0, 40
-	bgez	$3, _safe_lab_5_
-# was:	bgez	_size_reg_4_, _safe_lab_5_
+# was:	ori	_size_reg_3_, $0, 40
+	bgez	$3, _safe_lab_4_
+# was:	bgez	_size_reg_3_, _safe_lab_4_
 	ori	$5, $0, 3
 # was:	ori	$5, $0, 3
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_5_:
+_safe_lab_4_:
 # dynalloc
 	ori	$2, $28, 0
-# was:	ori	_letBind_3_, $28, 0
+# was:	ori	_letBind_2_, $28, 0
 	sll	$4, $3, 2
-# was:	sll	_tmp_11_, _size_reg_4_, 2
+# was:	sll	_tmp_10_, _size_reg_3_, 2
 	addi	$4, $4, 4
-# was:	addi	_tmp_11_, _tmp_11_, 4
+# was:	addi	_tmp_10_, _tmp_10_, 4
 	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_11_
+# was:	add	$28, $28, _tmp_10_
 	sw	$3, 0($2)
-# was:	sw	_size_reg_4_, 0(_letBind_3_)
+# was:	sw	_size_reg_3_, 0(_letBind_2_)
 	addi	$6, $2, 4
-# was:	addi	_addr_reg_6_, _letBind_3_, 4
+# was:	addi	_addr_reg_5_, _letBind_2_, 4
 	ori	$5, $0, 0
-# was:	ori	_i_reg_7_, $0, 0
-_loop_beg_8_:
+# was:	ori	_i_reg_6_, $0, 0
+_loop_beg_7_:
 	sub	$4, $5, $3
-# was:	sub	_tmp_reg_10_, _i_reg_7_, _size_reg_4_
-	bgez	$4, _loop_end_9_
-# was:	bgez	_tmp_reg_10_, _loop_end_9_
+# was:	sub	_tmp_reg_9_, _i_reg_6_, _size_reg_3_
+	bgez	$4, _loop_end_8_
+# was:	bgez	_tmp_reg_9_, _loop_end_8_
 	sw	$5, 0($6)
-# was:	sw	_i_reg_7_, 0(_addr_reg_6_)
+# was:	sw	_i_reg_6_, 0(_addr_reg_5_)
 	addi	$6, $6, 4
-# was:	addi	_addr_reg_6_, _addr_reg_6_, 4
+# was:	addi	_addr_reg_5_, _addr_reg_5_, 4
 	addi	$5, $5, 1
-# was:	addi	_i_reg_7_, _i_reg_7_, 1
-	j	_loop_beg_8_
-_loop_end_9_:
-	ori	$0, $0, 4
-# was:	ori	_letBind_12_, $0, 4
+# was:	addi	_i_reg_6_, _i_reg_6_, 1
+	j	_loop_beg_7_
+_loop_end_8_:
 	ori	$4, $0, 4
-# was:	ori	_arr_ind_14_, $0, 4
+# was:	ori	_arr_ind_12_, $0, 4
 	addi	$3, $2, 4
-# was:	addi	_arr_reg_15_, _letBind_3_, 4
+# was:	addi	_arr_reg_13_, _letBind_2_, 4
 	lw	$2, 0($2)
-# was:	lw	_size_reg_16_, 0(_letBind_3_)
-	bgez	$4, _safe_lab_19_
-# was:	bgez	_arr_ind_14_, _safe_lab_19_
-_error_lab_18_:
+# was:	lw	_size_reg_14_, 0(_letBind_2_)
+	bgez	$4, _safe_lab_17_
+# was:	bgez	_arr_ind_12_, _safe_lab_17_
+_error_lab_16_:
 	ori	$5, $0, 5
 # was:	ori	$5, $0, 5
 	la	$6, _Msg_IllegalIndex_
 # was:	la	$6, _Msg_IllegalIndex_
 	j	_RuntimeError_
-_safe_lab_19_:
+_safe_lab_17_:
 	sub	$2, $4, $2
-# was:	sub	_tmp_reg_17_, _arr_ind_14_, _size_reg_16_
-	bgez	$2, _error_lab_18_
-# was:	bgez	_tmp_reg_17_, _error_lab_18_
+# was:	sub	_tmp_reg_15_, _arr_ind_12_, _size_reg_14_
+	bgez	$2, _error_lab_16_
+# was:	bgez	_tmp_reg_15_, _error_lab_16_
 	sll	$4, $4, 2
-# was:	sll	_arr_ind_14_, _arr_ind_14_, 2
+# was:	sll	_arr_ind_12_, _arr_ind_12_, 2
 	add	$3, $3, $4
-# was:	add	_arr_reg_15_, _arr_reg_15_, _arr_ind_14_
+# was:	add	_arr_reg_13_, _arr_reg_13_, _arr_ind_12_
 	lw	$16, 0($3)
-# was:	lw	_letBind_13_, 0(_arr_reg_15_)
-# 	ori	_tmp_20_,_letBind_13_,0
-# 	ori	_mainres_1_,_tmp_20_,0
+# was:	lw	_letBind_11_, 0(_arr_reg_13_)
+# 	ori	_tmp_18_,_letBind_11_,0
+# 	ori	_mainres_1_,_tmp_18_,0
 	ori	$2, $16, 0
 # was:	ori	$2, _mainres_1_, 0
 	jal	putint
diff --git a/tests/dead_bnd_rem.asm b/tests/dead_bnd_rem.asm
index 994c9f0..fb18024 100644
--- a/tests/dead_bnd_rem.asm
+++ b/tests/dead_bnd_rem.asm
@@ -28,49 +28,24 @@ main:
 # 	ori	_times_L_4_,_letBind_2_,0
 	ori	$3, $2, 0
 # was:	ori	_times_R_5_, _letBind_2_, 0
-	mul	$4, $2, $3
+	mul	$0, $2, $3
 # was:	mul	_letBind_3_, _times_L_4_, _times_R_5_
-# 	ori	_plus_L_9_,_letBind_3_,0
-	ori	$3, $0, 3
-# was:	ori	_plus_R_10_, $0, 3
-	add	$3, $4, $3
-# was:	add	_letBind_8_, _plus_L_9_, _plus_R_10_
-# 	ori	_plus_L_12_,_letBind_8_,0
-# 	ori	_plus_R_13_,_letBind_2_,0
-	add	$3, $3, $2
-# was:	add	_letBind_11_, _plus_L_12_, _plus_R_13_
-# 	ori	_plus_L_14_,_letBind_11_,0
-	ori	$4, $0, 8
-# was:	ori	_plus_R_15_, $0, 8
-	add	$0, $3, $4
-# was:	add	_letBind_7_, _plus_L_14_, _plus_R_15_
-# 	ori	_letBind_6_,_letBind_2_,0
-	ori	$4, $2, 0
-# was:	ori	_plus_L_17_, _letBind_2_, 0
+# 	ori	_plus_L_7_,_letBind_2_,0
 	ori	$3, $0, 2
-# was:	ori	_plus_R_18_, $0, 2
-	add	$3, $4, $3
-# was:	add	_letBind_16_, _plus_L_17_, _plus_R_18_
-# 	ori	_plus_L_22_,_letBind_16_,0
-	ori	$4, $0, 2
-# was:	ori	_plus_R_23_, $0, 2
-	add	$4, $3, $4
-# was:	add	_plus_L_20_, _plus_L_22_, _plus_R_23_
-	ori	$5, $2, 0
-# was:	ori	_plus_R_21_, _letBind_6_, 0
-	add	$0, $4, $5
-# was:	add	_letBind_19_, _plus_L_20_, _plus_R_21_
-# 	ori	_plus_L_26_,_letBind_2_,0
+# was:	ori	_plus_R_8_, $0, 2
+	add	$3, $2, $3
+# was:	add	_letBind_6_, _plus_L_7_, _plus_R_8_
+# 	ori	_plus_L_11_,_letBind_2_,0
 	ori	$4, $0, 3
-# was:	ori	_plus_R_27_, $0, 3
+# was:	ori	_plus_R_12_, $0, 3
 	add	$2, $2, $4
-# was:	add	_letBind_25_, _plus_L_26_, _plus_R_27_
-# 	ori	_times_L_28_,_letBind_16_,0
-# 	ori	_times_R_29_,_letBind_25_,0
+# was:	add	_letBind_10_, _plus_L_11_, _plus_R_12_
+# 	ori	_times_L_13_,_letBind_6_,0
+# 	ori	_times_R_14_,_letBind_10_,0
 	mul	$16, $3, $2
-# was:	mul	_letBind_24_, _times_L_28_, _times_R_29_
-# 	ori	_tmp_30_,_letBind_24_,0
-# 	ori	_mainres_1_,_tmp_30_,0
+# was:	mul	_letBind_9_, _times_L_13_, _times_R_14_
+# 	ori	_tmp_15_,_letBind_9_,0
+# 	ori	_mainres_1_,_tmp_15_,0
 	ori	$2, $16, 0
 # was:	ori	$2, _mainres_1_, 0
 	jal	putint
diff --git a/tests/filter-on-2darr.asm b/tests/filter-on-2darr.asm
index cf49951..d64210e 100644
--- a/tests/filter-on-2darr.asm
+++ b/tests/filter-on-2darr.asm
@@ -17,406 +17,341 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function write_int
-write_int:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-# 	ori	_param_x_1_,$2,0
-	ori	$16, $2, 0
-# was:	ori	_tmp_3_, _param_x_1_, 0
-# 	ori	_write_intres_2_,_tmp_3_,0
-	ori	$2, $16, 0
-# was:	ori	$2, _write_intres_2_, 0
-	jal	putint
-# was:	jal	putint, $2
-	ori	$2, $16, 0
-# was:	ori	$2, _write_intres_2_, 0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function write_1darr
-write_1darr:
-	sw	$31, -4($29)
-	sw	$20, -24($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -28
-# 	ori	_param_x_4_,$2,0
-# map
-# 	ori	_arr_reg_7_,_param_x_4_,0
-	lw	$16, 0($2)
-# was:	lw	_size_reg_6_, 0(_arr_reg_7_)
-# dynalloc
-	ori	$17, $28, 0
-# was:	ori	_write_1darrres_5_, $28, 0
-	sll	$3, $16, 2
-# was:	sll	_tmp_16_, _size_reg_6_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_16_, _tmp_16_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_16_
-	sw	$16, 0($17)
-# was:	sw	_size_reg_6_, 0(_write_1darrres_5_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_10_, _write_1darrres_5_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_11_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_8_, _arr_reg_7_, 4
-_loop_beg_12_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_14_, _i_reg_11_, _size_reg_6_
-	bgez	$2, _loop_end_13_
-# was:	bgez	_tmp_reg_14_, _loop_end_13_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_9_, 0(_elem_reg_8_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_8_, _elem_reg_8_, 4
-# 	ori	$2,_res_reg_9_,0
-	jal	write_int
-# was:	jal	write_int, $2
-# 	ori	_tmp_reg_15_,$2,0
-# 	ori	_res_reg_9_,_tmp_reg_15_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_9_, 0(_addr_reg_10_)
-	addi	$18, $18, 4
-# was:	addi	_addr_reg_10_, _addr_reg_10_, 4
-	addi	$19, $19, 1
-# was:	addi	_i_reg_11_, _i_reg_11_, 1
-	j	_loop_beg_12_
-_loop_end_13_:
-	ori	$2, $17, 0
-# was:	ori	$2, _write_1darrres_5_, 0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function write_2darr
-write_2darr:
-	sw	$31, -4($29)
-	sw	$20, -24($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -28
-# 	ori	_param_x_17_,$2,0
-# map
-# 	ori	_arr_reg_20_,_param_x_17_,0
-	lw	$16, 0($2)
-# was:	lw	_size_reg_19_, 0(_arr_reg_20_)
-# dynalloc
-	ori	$17, $28, 0
-# was:	ori	_write_2darrres_18_, $28, 0
-	sll	$3, $16, 2
-# was:	sll	_tmp_29_, _size_reg_19_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_29_, _tmp_29_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_29_
-	sw	$16, 0($17)
-# was:	sw	_size_reg_19_, 0(_write_2darrres_18_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_23_, _write_2darrres_18_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_24_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_21_, _arr_reg_20_, 4
-_loop_beg_25_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_27_, _i_reg_24_, _size_reg_19_
-	bgez	$2, _loop_end_26_
-# was:	bgez	_tmp_reg_27_, _loop_end_26_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_22_, 0(_elem_reg_21_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_21_, _elem_reg_21_, 4
-# 	ori	$2,_res_reg_22_,0
-	jal	write_1darr
-# was:	jal	write_1darr, $2
-# 	ori	_tmp_reg_28_,$2,0
-# 	ori	_res_reg_22_,_tmp_reg_28_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_22_, 0(_addr_reg_23_)
-	addi	$18, $18, 4
-# was:	addi	_addr_reg_23_, _addr_reg_23_, 4
-	addi	$19, $19, 1
-# was:	addi	_i_reg_24_, _i_reg_24_, 1
-	j	_loop_beg_25_
-_loop_end_26_:
-	ori	$2, $17, 0
-# was:	ori	$2, _write_2darrres_18_, 0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function even
-even:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_a_30_,$2,0
-# 	ori	_divide_L_36_,_param_a_30_,0
-	ori	$3, $0, 2
-# was:	ori	_divide_R_37_, $0, 2
-	div	$4, $2, $3
-# was:	div	_times_L_34_, _divide_L_36_, _divide_R_37_
-	ori	$3, $0, 2
-# was:	ori	_times_R_35_, $0, 2
-	mul	$3, $4, $3
-# was:	mul	_eq_L_32_, _times_L_34_, _times_R_35_
-# 	ori	_eq_R_33_,_param_a_30_,0
-	ori	$4, $0, 0
-# was:	ori	_evenres_31_, $0, 0
-	bne	$3, $2, _false_38_
-# was:	bne	_eq_L_32_, _eq_R_33_, _false_38_
-	ori	$4, $0, 1
-# was:	ori	_evenres_31_, $0, 1
-_false_38_:
-	ori	$2, $4, 0
-# was:	ori	$2, _evenres_31_, 0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
-	sw	$22, -32($29)
-	sw	$21, -28($29)
-	sw	$20, -24($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -36
+	sw	$25, -48($29)
+	sw	$24, -44($29)
+	sw	$23, -40($29)
+	sw	$22, -36($29)
+	sw	$21, -32($29)
+	sw	$20, -28($29)
+	sw	$19, -24($29)
+	sw	$18, -20($29)
+	sw	$17, -16($29)
+	sw	$16, -12($29)
+	addi	$29, $29, -52
+	sw	$2, 0($29)
+# was:	sw	_fun_arg_res_85_, 0($29)
 	jal	getint
 # was:	jal	getint, $2
-# 	ori	_letBind_40_,$2,0
+# 	ori	_letBind_2_,$2,0
 # map
 	ori	$3, $2, 0
-# was:	ori	_size_reg_46_, _letBind_40_, 0
-	bgez	$3, _safe_lab_47_
-# was:	bgez	_size_reg_46_, _safe_lab_47_
+# was:	ori	_size_reg_8_, _letBind_2_, 0
+	bgez	$3, _safe_lab_9_
+# was:	bgez	_size_reg_8_, _safe_lab_9_
 	ori	$5, $0, 11
 # was:	ori	$5, $0, 11
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_47_:
+_safe_lab_9_:
 # dynalloc
 	ori	$2, $28, 0
-# was:	ori	_arr_reg_43_, $28, 0
+# was:	ori	_arr_reg_5_, $28, 0
 	sll	$4, $3, 2
-# was:	sll	_tmp_53_, _size_reg_46_, 2
+# was:	sll	_tmp_15_, _size_reg_8_, 2
 	addi	$4, $4, 4
-# was:	addi	_tmp_53_, _tmp_53_, 4
+# was:	addi	_tmp_15_, _tmp_15_, 4
 	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_53_
+# was:	add	$28, $28, _tmp_15_
 	sw	$3, 0($2)
-# was:	sw	_size_reg_46_, 0(_arr_reg_43_)
-	addi	$6, $2, 4
-# was:	addi	_addr_reg_48_, _arr_reg_43_, 4
-	ori	$4, $0, 0
-# was:	ori	_i_reg_49_, $0, 0
-_loop_beg_50_:
-	sub	$5, $4, $3
-# was:	sub	_tmp_reg_52_, _i_reg_49_, _size_reg_46_
-	bgez	$5, _loop_end_51_
-# was:	bgez	_tmp_reg_52_, _loop_end_51_
-	sw	$4, 0($6)
-# was:	sw	_i_reg_49_, 0(_addr_reg_48_)
-	addi	$6, $6, 4
-# was:	addi	_addr_reg_48_, _addr_reg_48_, 4
-	addi	$4, $4, 1
-# was:	addi	_i_reg_49_, _i_reg_49_, 1
-	j	_loop_beg_50_
-_loop_end_51_:
-	lw	$3, 0($2)
-# was:	lw	_size_reg_42_, 0(_arr_reg_43_)
-# dynalloc
-	ori	$4, $28, 0
-# was:	ori	_letBind_41_, $28, 0
-	sll	$5, $3, 2
-# was:	sll	_tmp_70_, _size_reg_42_, 2
+# was:	sw	_size_reg_8_, 0(_arr_reg_5_)
+	addi	$5, $2, 4
+# was:	addi	_addr_reg_10_, _arr_reg_5_, 4
+	ori	$6, $0, 0
+# was:	ori	_i_reg_11_, $0, 0
+_loop_beg_12_:
+	sub	$4, $6, $3
+# was:	sub	_tmp_reg_14_, _i_reg_11_, _size_reg_8_
+	bgez	$4, _loop_end_13_
+# was:	bgez	_tmp_reg_14_, _loop_end_13_
+	sw	$6, 0($5)
+# was:	sw	_i_reg_11_, 0(_addr_reg_10_)
 	addi	$5, $5, 4
-# was:	addi	_tmp_70_, _tmp_70_, 4
-	add	$28, $28, $5
-# was:	add	$28, $28, _tmp_70_
-	sw	$3, 0($4)
-# was:	sw	_size_reg_42_, 0(_letBind_41_)
-	addi	$6, $4, 4
-# was:	addi	_addr_reg_54_, _letBind_41_, 4
-	ori	$5, $0, 0
-# was:	ori	_i_reg_55_, $0, 0
-	addi	$7, $2, 4
-# was:	addi	_elem_reg_44_, _arr_reg_43_, 4
-_loop_beg_56_:
-	sub	$2, $5, $3
-# was:	sub	_tmp_reg_58_, _i_reg_55_, _size_reg_42_
-	bgez	$2, _loop_end_57_
-# was:	bgez	_tmp_reg_58_, _loop_end_57_
-	lw	$2, 0($7)
-# was:	lw	_res_reg_45_, 0(_elem_reg_44_)
-	addi	$7, $7, 4
-# was:	addi	_elem_reg_44_, _elem_reg_44_, 4
-	ori	$8, $2, 0
-# was:	ori	_plus_L_61_, _res_reg_45_, 0
-	ori	$2, $0, 2
-# was:	ori	_plus_R_62_, $0, 2
-	add	$8, $8, $2
-# was:	add	_size_reg_60_, _plus_L_61_, _plus_R_62_
-	bgez	$8, _safe_lab_63_
-# was:	bgez	_size_reg_60_, _safe_lab_63_
+# was:	addi	_addr_reg_10_, _addr_reg_10_, 4
+	addi	$6, $6, 1
+# was:	addi	_i_reg_11_, _i_reg_11_, 1
+	j	_loop_beg_12_
+_loop_end_13_:
+	lw	$5, 0($2)
+# was:	lw	_size_reg_4_, 0(_arr_reg_5_)
+# dynalloc
+	ori	$6, $28, 0
+# was:	ori	_letBind_3_, $28, 0
+	sll	$3, $5, 2
+# was:	sll	_tmp_32_, _size_reg_4_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_32_, _tmp_32_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_32_
+	sw	$5, 0($6)
+# was:	sw	_size_reg_4_, 0(_letBind_3_)
+	addi	$7, $6, 4
+# was:	addi	_addr_reg_16_, _letBind_3_, 4
+	ori	$8, $0, 0
+# was:	ori	_i_reg_17_, $0, 0
+	addi	$4, $2, 4
+# was:	addi	_elem_reg_6_, _arr_reg_5_, 4
+_loop_beg_18_:
+	sub	$2, $8, $5
+# was:	sub	_tmp_reg_20_, _i_reg_17_, _size_reg_4_
+	bgez	$2, _loop_end_19_
+# was:	bgez	_tmp_reg_20_, _loop_end_19_
+	lw	$2, 0($4)
+# was:	lw	_res_reg_7_, 0(_elem_reg_6_)
+	addi	$4, $4, 4
+# was:	addi	_elem_reg_6_, _elem_reg_6_, 4
+# 	ori	_plus_L_23_,_res_reg_7_,0
+	ori	$3, $0, 2
+# was:	ori	_plus_R_24_, $0, 2
+	add	$2, $2, $3
+# was:	add	_size_reg_22_, _plus_L_23_, _plus_R_24_
+	bgez	$2, _safe_lab_25_
+# was:	bgez	_size_reg_22_, _safe_lab_25_
 	ori	$5, $0, 10
 # was:	ori	$5, $0, 10
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_63_:
+_safe_lab_25_:
 # dynalloc
-	ori	$2, $28, 0
-# was:	ori	_fun_arg_res_59_, $28, 0
-	sll	$9, $8, 2
-# was:	sll	_tmp_69_, _size_reg_60_, 2
+	ori	$3, $28, 0
+# was:	ori	_fun_arg_res_21_, $28, 0
+	sll	$9, $2, 2
+# was:	sll	_tmp_31_, _size_reg_22_, 2
 	addi	$9, $9, 4
-# was:	addi	_tmp_69_, _tmp_69_, 4
+# was:	addi	_tmp_31_, _tmp_31_, 4
 	add	$28, $28, $9
-# was:	add	$28, $28, _tmp_69_
-	sw	$8, 0($2)
-# was:	sw	_size_reg_60_, 0(_fun_arg_res_59_)
-	addi	$10, $2, 4
-# was:	addi	_addr_reg_64_, _fun_arg_res_59_, 4
-	ori	$11, $0, 0
-# was:	ori	_i_reg_65_, $0, 0
-_loop_beg_66_:
-	sub	$9, $11, $8
-# was:	sub	_tmp_reg_68_, _i_reg_65_, _size_reg_60_
-	bgez	$9, _loop_end_67_
-# was:	bgez	_tmp_reg_68_, _loop_end_67_
-	sw	$11, 0($10)
-# was:	sw	_i_reg_65_, 0(_addr_reg_64_)
-	addi	$10, $10, 4
-# was:	addi	_addr_reg_64_, _addr_reg_64_, 4
-	addi	$11, $11, 1
-# was:	addi	_i_reg_65_, _i_reg_65_, 1
-	j	_loop_beg_66_
-_loop_end_67_:
-# 	ori	_res_reg_45_,_fun_arg_res_59_,0
-	sw	$2, 0($6)
-# was:	sw	_res_reg_45_, 0(_addr_reg_54_)
-	addi	$6, $6, 4
-# was:	addi	_addr_reg_54_, _addr_reg_54_, 4
-	addi	$5, $5, 1
-# was:	addi	_i_reg_55_, _i_reg_55_, 1
-	j	_loop_beg_56_
-_loop_end_57_:
-# 	ori	_arr_reg_73_,_letBind_41_,0
-	lw	$17, 0($4)
-# was:	lw	_size_reg_72_, 0(_arr_reg_73_)
+# was:	add	$28, $28, _tmp_31_
+	sw	$2, 0($3)
+# was:	sw	_size_reg_22_, 0(_fun_arg_res_21_)
+	addi	$11, $3, 4
+# was:	addi	_addr_reg_26_, _fun_arg_res_21_, 4
+	ori	$9, $0, 0
+# was:	ori	_i_reg_27_, $0, 0
+_loop_beg_28_:
+	sub	$10, $9, $2
+# was:	sub	_tmp_reg_30_, _i_reg_27_, _size_reg_22_
+	bgez	$10, _loop_end_29_
+# was:	bgez	_tmp_reg_30_, _loop_end_29_
+	sw	$9, 0($11)
+# was:	sw	_i_reg_27_, 0(_addr_reg_26_)
+	addi	$11, $11, 4
+# was:	addi	_addr_reg_26_, _addr_reg_26_, 4
+	addi	$9, $9, 1
+# was:	addi	_i_reg_27_, _i_reg_27_, 1
+	j	_loop_beg_28_
+_loop_end_29_:
+	ori	$2, $3, 0
+# was:	ori	_res_reg_7_, _fun_arg_res_21_, 0
+	sw	$2, 0($7)
+# was:	sw	_res_reg_7_, 0(_addr_reg_16_)
+	addi	$7, $7, 4
+# was:	addi	_addr_reg_16_, _addr_reg_16_, 4
+	addi	$8, $8, 1
+# was:	addi	_i_reg_17_, _i_reg_17_, 1
+	j	_loop_beg_18_
+_loop_end_19_:
+	ori	$7, $6, 0
+# was:	ori	_arr_reg_35_, _letBind_3_, 0
+	lw	$2, 0($7)
+# was:	lw	_size_reg_34_, 0(_arr_reg_35_)
 # dynalloc
-	ori	$16, $28, 0
-# was:	ori	_letBind_71_, $28, 0
-	sll	$2, $17, 2
-# was:	sll	_tmp_96_, _size_reg_72_, 2
-	addi	$2, $2, 4
-# was:	addi	_tmp_96_, _tmp_96_, 4
-	add	$28, $28, $2
-# was:	add	$28, $28, _tmp_96_
-	sw	$17, 0($16)
-# was:	sw	_size_reg_72_, 0(_letBind_71_)
-	addi	$19, $16, 4
-# was:	addi	_addr_reg_77_, _letBind_71_, 4
-	ori	$20, $0, 0
-# was:	ori	_i_reg_78_, $0, 0
-	ori	$18, $0, 0
-# was:	ori	_j_reg_79_, $0, 0
-	addi	$21, $4, 4
-# was:	addi	_elem_reg_74_, _arr_reg_73_, 4
-_loop_beg_80_:
-	sub	$2, $20, $17
-# was:	sub	_tmp_reg_83_, _i_reg_78_, _size_reg_72_
-	bgez	$2, _loop_end_81_
-# was:	bgez	_tmp_reg_83_, _loop_end_81_
-	lw	$22, 0($21)
-# was:	lw	_res_reg_75_, 0(_elem_reg_74_)
-	addi	$21, $21, 4
-# was:	addi	_elem_reg_74_, _elem_reg_74_, 4
-	ori	$3, $22, 0
-# was:	ori	_arr_reg_86_, _res_reg_75_, 0
-	lw	$2, 0($3)
-# was:	lw	_size_reg_87_, 0(_arr_reg_86_)
-	ori	$6, $0, 0
-# was:	ori	_letBind_85_, $0, 0
-	addi	$3, $3, 4
-# was:	addi	_arr_reg_86_, _arr_reg_86_, 4
+	ori	$3, $28, 0
+# was:	ori	_letBind_33_, $28, 0
+	sll	$4, $2, 2
+# was:	sll	_tmp_65_, _size_reg_34_, 2
+	addi	$4, $4, 4
+# was:	addi	_tmp_65_, _tmp_65_, 4
+	add	$28, $28, $4
+# was:	add	$28, $28, _tmp_65_
+	sw	$2, 0($3)
+# was:	sw	_size_reg_34_, 0(_letBind_33_)
+	addi	$6, $3, 4
+# was:	addi	_addr_reg_39_, _letBind_33_, 4
 	ori	$4, $0, 0
-# was:	ori	_ind_var_88_, $0, 0
-_loop_beg_90_:
-	sub	$5, $4, $2
-# was:	sub	_tmp_reg_89_, _ind_var_88_, _size_reg_87_
-	bgez	$5, _loop_end_91_
-# was:	bgez	_tmp_reg_89_, _loop_end_91_
-	lw	$5, 0($3)
-# was:	lw	_tmp_reg_89_, 0(_arr_reg_86_)
-	addi	$3, $3, 4
-# was:	addi	_arr_reg_86_, _arr_reg_86_, 4
-# 	ori	_plus_L_93_,_letBind_85_,0
-# 	ori	_plus_R_94_,_tmp_reg_89_,0
-	add	$6, $6, $5
-# was:	add	_fun_arg_res_92_, _plus_L_93_, _plus_R_94_
-# 	ori	_letBind_85_,_fun_arg_res_92_,0
+# was:	ori	_i_reg_40_, $0, 0
+	ori	$5, $0, 0
+# was:	ori	_j_reg_41_, $0, 0
+	addi	$7, $7, 4
+# was:	addi	_elem_reg_36_, _arr_reg_35_, 4
+_loop_beg_42_:
+	sub	$8, $4, $2
+# was:	sub	_tmp_reg_45_, _i_reg_40_, _size_reg_34_
+	bgez	$8, _loop_end_43_
+# was:	bgez	_tmp_reg_45_, _loop_end_43_
+	lw	$8, 0($7)
+# was:	lw	_res_reg_37_, 0(_elem_reg_36_)
+	addi	$7, $7, 4
+# was:	addi	_elem_reg_36_, _elem_reg_36_, 4
+	ori	$11, $8, 0
+# was:	ori	_arr_reg_48_, _res_reg_37_, 0
+	lw	$9, 0($11)
+# was:	lw	_size_reg_49_, 0(_arr_reg_48_)
+	ori	$13, $0, 0
+# was:	ori	_letBind_47_, $0, 0
+	addi	$11, $11, 4
+# was:	addi	_arr_reg_48_, _arr_reg_48_, 4
+	ori	$10, $0, 0
+# was:	ori	_ind_var_50_, $0, 0
+_loop_beg_52_:
+	sub	$12, $10, $9
+# was:	sub	_tmp_reg_51_, _ind_var_50_, _size_reg_49_
+	bgez	$12, _loop_end_53_
+# was:	bgez	_tmp_reg_51_, _loop_end_53_
+	lw	$12, 0($11)
+# was:	lw	_tmp_reg_51_, 0(_arr_reg_48_)
+	addi	$11, $11, 4
+# was:	addi	_arr_reg_48_, _arr_reg_48_, 4
+# 	ori	_plus_L_55_,_letBind_47_,0
+# 	ori	_plus_R_56_,_tmp_reg_51_,0
+	add	$13, $13, $12
+# was:	add	_fun_arg_res_54_, _plus_L_55_, _plus_R_56_
+# 	ori	_letBind_47_,_fun_arg_res_54_,0
+	addi	$10, $10, 1
+# was:	addi	_ind_var_50_, _ind_var_50_, 1
+	j	_loop_beg_52_
+_loop_end_53_:
+	ori	$10, $13, 0
+# was:	ori	_letBind_57_, _letBind_47_, 0
+# 	ori	_divide_L_62_,_letBind_57_,0
+	ori	$9, $0, 2
+# was:	ori	_divide_R_63_, $0, 2
+	div	$10, $10, $9
+# was:	div	_times_L_60_, _divide_L_62_, _divide_R_63_
+	ori	$9, $0, 2
+# was:	ori	_times_R_61_, $0, 2
+	mul	$9, $10, $9
+# was:	mul	_eq_L_58_, _times_L_60_, _times_R_61_
+# 	ori	_eq_R_59_,_letBind_47_,0
+	ori	$10, $0, 0
+# was:	ori	_fun_arg_res_46_, $0, 0
+	bne	$9, $13, _false_64_
+# was:	bne	_eq_L_58_, _eq_R_59_, _false_64_
+	ori	$10, $0, 1
+# was:	ori	_fun_arg_res_46_, $0, 1
+_false_64_:
+# 	ori	_bool_reg_38_,_fun_arg_res_46_,0
+	beq	$10, $0, _not_true_44_
+# was:	beq	_bool_reg_38_, $0, _not_true_44_
+	sw	$8, 0($6)
+# was:	sw	_res_reg_37_, 0(_addr_reg_39_)
+	addi	$5, $5, 1
+# was:	addi	_j_reg_41_, _j_reg_41_, 1
+	addi	$6, $6, 4
+# was:	addi	_addr_reg_39_, _addr_reg_39_, 4
+_not_true_44_:
 	addi	$4, $4, 1
-# was:	addi	_ind_var_88_, _ind_var_88_, 1
-	j	_loop_beg_90_
-_loop_end_91_:
-	ori	$2, $6, 0
-# was:	ori	_arg_95_, _letBind_85_, 0
-# 	ori	$2,_arg_95_,0
-	jal	even
-# was:	jal	even, $2
-# 	ori	_fun_arg_res_84_,$2,0
-# 	ori	_bool_reg_76_,_fun_arg_res_84_,0
-	beq	$2, $0, _not_true_82_
-# was:	beq	_bool_reg_76_, $0, _not_true_82_
-	sw	$22, 0($19)
-# was:	sw	_res_reg_75_, 0(_addr_reg_77_)
-	addi	$18, $18, 1
-# was:	addi	_j_reg_79_, _j_reg_79_, 1
+# was:	addi	_i_reg_40_, _i_reg_40_, 1
+	j	_loop_beg_42_
+_loop_end_43_:
+	sw	$5, 0($3)
+# was:	sw	_j_reg_41_, 0(_letBind_33_)
+# map
+# 	ori	_arr_reg_67_,_letBind_33_,0
+	lw	$16, 0($3)
+# was:	lw	_size_reg_66_, 0(_arr_reg_67_)
+# dynalloc
+	ori	$17, $28, 0
+# was:	ori	_mainres_1_, $28, 0
+	sll	$2, $16, 2
+# was:	sll	_tmp_88_, _size_reg_66_, 2
+	addi	$2, $2, 4
+# was:	addi	_tmp_88_, _tmp_88_, 4
+	add	$28, $28, $2
+# was:	add	$28, $28, _tmp_88_
+	sw	$16, 0($17)
+# was:	sw	_size_reg_66_, 0(_mainres_1_)
+	addi	$19, $17, 4
+# was:	addi	_addr_reg_70_, _mainres_1_, 4
+	ori	$18, $0, 0
+# was:	ori	_i_reg_71_, $0, 0
+	addi	$20, $3, 4
+# was:	addi	_elem_reg_68_, _arr_reg_67_, 4
+_loop_beg_72_:
+	sub	$2, $18, $16
+# was:	sub	_tmp_reg_74_, _i_reg_71_, _size_reg_66_
+	bgez	$2, _loop_end_73_
+# was:	bgez	_tmp_reg_74_, _loop_end_73_
+	lw	$2, 0($20)
+# was:	lw	_res_reg_69_, 0(_elem_reg_68_)
+	addi	$20, $20, 4
+# was:	addi	_elem_reg_68_, _elem_reg_68_, 4
+# map
+# 	ori	_arr_reg_77_,_res_reg_69_,0
+	lw	$22, 0($2)
+# was:	lw	_size_reg_76_, 0(_arr_reg_77_)
+# dynalloc
+	ori	$21, $28, 0
+# was:	ori	_fun_arg_res_75_, $28, 0
+	sll	$3, $22, 2
+# was:	sll	_tmp_87_, _size_reg_76_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_87_, _tmp_87_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_87_
+	sw	$22, 0($21)
+# was:	sw	_size_reg_76_, 0(_fun_arg_res_75_)
+	addi	$23, $21, 4
+# was:	addi	_addr_reg_80_, _fun_arg_res_75_, 4
+	ori	$24, $0, 0
+# was:	ori	_i_reg_81_, $0, 0
+	addi	$25, $2, 4
+# was:	addi	_elem_reg_78_, _arr_reg_77_, 4
+_loop_beg_82_:
+	sub	$2, $24, $22
+# was:	sub	_tmp_reg_84_, _i_reg_81_, _size_reg_76_
+	bgez	$2, _loop_end_83_
+# was:	bgez	_tmp_reg_84_, _loop_end_83_
+	lw	$2, 0($25)
+# was:	lw	_res_reg_79_, 0(_elem_reg_78_)
+	addi	$25, $25, 4
+# was:	addi	_elem_reg_78_, _elem_reg_78_, 4
+# 	ori	_tmp_86_,_res_reg_79_,0
+# 	ori	_fun_arg_res_85_,_tmp_86_,0
+	sw	$2, 0($29)
+# was:	sw	_fun_arg_res_85_, 0($29)
+	lw	$2, 0($29)
+# was:	lw	_fun_arg_res_85_, 0($29)
+# 	ori	$2,_fun_arg_res_85_,0
+	jal	putint
+# was:	jal	putint, $2
+	lw	$2, 0($29)
+# was:	lw	_fun_arg_res_85_, 0($29)
+# 	ori	_res_reg_79_,_fun_arg_res_85_,0
+	sw	$2, 0($23)
+# was:	sw	_res_reg_79_, 0(_addr_reg_80_)
+	addi	$23, $23, 4
+# was:	addi	_addr_reg_80_, _addr_reg_80_, 4
+	addi	$24, $24, 1
+# was:	addi	_i_reg_81_, _i_reg_81_, 1
+	j	_loop_beg_82_
+_loop_end_83_:
+	ori	$2, $21, 0
+# was:	ori	_res_reg_69_, _fun_arg_res_75_, 0
+	sw	$2, 0($19)
+# was:	sw	_res_reg_69_, 0(_addr_reg_70_)
 	addi	$19, $19, 4
-# was:	addi	_addr_reg_77_, _addr_reg_77_, 4
-_not_true_82_:
-	addi	$20, $20, 1
-# was:	addi	_i_reg_78_, _i_reg_78_, 1
-	j	_loop_beg_80_
-_loop_end_81_:
-	sw	$18, 0($16)
-# was:	sw	_j_reg_79_, 0(_letBind_71_)
-	ori	$2, $16, 0
-# was:	ori	_arg_97_, _letBind_71_, 0
-# 	ori	$2,_arg_97_,0
-	jal	write_2darr
-# was:	jal	write_2darr, $2
-# 	ori	_mainres_39_,$2,0
-# 	ori	$2,_mainres_39_,0
-	addi	$29, $29, 36
-	lw	$22, -32($29)
-	lw	$21, -28($29)
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
+# was:	addi	_addr_reg_70_, _addr_reg_70_, 4
+	addi	$18, $18, 1
+# was:	addi	_i_reg_71_, _i_reg_71_, 1
+	j	_loop_beg_72_
+_loop_end_73_:
+	ori	$2, $17, 0
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 52
+	lw	$25, -48($29)
+	lw	$24, -44($29)
+	lw	$23, -40($29)
+	lw	$22, -36($29)
+	lw	$21, -32($29)
+	lw	$20, -28($29)
+	lw	$19, -24($29)
+	lw	$18, -20($29)
+	lw	$17, -16($29)
+	lw	$16, -12($29)
 	lw	$31, -4($29)
 	jr	$31
 ord:
diff --git a/tests/filter.asm b/tests/filter.asm
index cd1420c..f10e472 100644
--- a/tests/filter.asm
+++ b/tests/filter.asm
@@ -2,194 +2,293 @@
 	.globl	main
 	la	$28, _heap_
 	la	$4, _true
+# was:	la	_true_addr, _true
 	ori	$3, $0, 4
+# was:	ori	_true_init, $0, 4
 	sw	$3, 0($4)
+# was:	sw	_true_init, 0(_true_addr)
 	la	$3, _false
+# was:	la	_false_addr, _false
 	ori	$4, $0, 5
+# was:	ori	_false_init, $0, 5
 	sw	$4, 0($3)
+# was:	sw	_false_init, 0(_false_addr)
 	jal	main
 _stop_:
 	ori	$2, $0, 10
 	syscall
-write_int:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-	ori	$16, $2, 0
-	ori	$2, $16, 0
-	jal	putint
-	ori	$2, $16, 0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-write_int_arr:
-	sw	$31, -4($29)
-	sw	$20, -24($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -28
-	lw	$16, 0($2)
-	ori	$17, $28, 0
-	sll	$3, $16, 2
-	addi	$3, $3, 4
-	add	$28, $28, $3
-	sw	$16, 0($17)
-	addi	$18, $17, 4
-	ori	$19, $0, 0
-	addi	$20, $2, 4
-_loop_beg_12_:
-	sub	$2, $19, $16
-	bgez	$2, _loop_end_13_
-	lw	$2, 0($20)
-	addi	$20, $20, 4
-	jal	write_int
-	sw	$2, 0($18)
-	addi	$18, $18, 4
-	addi	$19, $19, 1
-	j	_loop_beg_12_
-_loop_end_13_:
-	ori	$2, $17, 0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-isMul16:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-	ori	$3, $0, 16
-	div	$4, $2, $3
-	ori	$3, $0, 16
-	mul	$3, $4, $3
-	ori	$4, $0, 0
-	bne	$3, $2, _false_25_
-	ori	$4, $0, 1
-_false_25_:
-	ori	$2, $4, 0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
+# Function main
 main:
 	sw	$31, -4($29)
-	sw	$22, -32($29)
 	sw	$21, -28($29)
 	sw	$20, -24($29)
 	sw	$19, -20($29)
 	sw	$18, -16($29)
 	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -36
+	addi	$29, $29, -32
 	jal	getint
-	bgez	$2, _safe_lab_35_
+# was:	jal	getint, $2
+# 	ori	_letBind_2_,$2,0
+# 	ori	_size_reg_9_,_letBind_2_,0
+	bgez	$2, _safe_lab_10_
+# was:	bgez	_size_reg_9_, _safe_lab_10_
 	ori	$5, $0, 10
+# was:	ori	$5, $0, 10
 	la	$6, _Msg_IllegalArraySize_
+# was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_35_:
+_safe_lab_10_:
+# dynalloc
 	ori	$7, $28, 0
+# was:	ori	_arr_reg_5_, $28, 0
 	sll	$3, $2, 2
+# was:	sll	_tmp_16_, _size_reg_9_, 2
 	addi	$3, $3, 4
+# was:	addi	_tmp_16_, _tmp_16_, 4
 	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_16_
 	sw	$2, 0($7)
-	addi	$3, $7, 4
-	ori	$5, $0, 0
-_loop_beg_38_:
-	sub	$4, $5, $2
-	bgez	$4, _loop_end_39_
-	sw	$5, 0($3)
-	addi	$3, $3, 4
-	addi	$5, $5, 1
-	j	_loop_beg_38_
-_loop_end_39_:
-	lw	$3, 0($7)
-	ori	$2, $28, 0
-	sll	$4, $3, 2
-	addi	$4, $4, 4
-	add	$28, $28, $4
-	sw	$3, 0($2)
-	addi	$4, $2, 4
-	ori	$6, $0, 0
-	ori	$5, $0, 0
-	addi	$7, $7, 4
-_loop_beg_45_:
-	sub	$8, $6, $3
-	bgez	$8, _loop_end_46_
-	lw	$10, 0($7)
-	addi	$7, $7, 4
-	ori	$9, $10, 0
-	ori	$8, $0, 2
-	div	$8, $9, $8
-	ori	$9, $0, 2
-	mul	$9, $8, $9
-	ori	$8, $0, 0
-	bne	$10, $9, _false_56_
-	ori	$8, $0, 1
-_false_56_:
-	beq	$8, $0, _not_true_47_
-	sw	$10, 0($4)
-	addi	$5, $5, 1
-	addi	$4, $4, 4
-_not_true_47_:
-	addi	$6, $6, 1
-	j	_loop_beg_45_
-_loop_end_46_:
-	sw	$5, 0($2)
-	lw	$5, 0($2)
-	ori	$4, $28, 0
-	sll	$3, $5, 2
-	addi	$3, $3, 4
-	add	$28, $28, $3
-	sw	$5, 0($4)
-	addi	$7, $4, 4
-	ori	$6, $0, 0
-	addi	$3, $2, 4
-_loop_beg_65_:
-	sub	$2, $6, $5
-	bgez	$2, _loop_end_66_
-	lw	$2, 0($3)
-	addi	$3, $3, 4
-	ori	$8, $2, 0
-	mul	$2, $8, $2
-	sw	$2, 0($7)
-	addi	$7, $7, 4
-	addi	$6, $6, 1
-	j	_loop_beg_65_
-_loop_end_66_:
-	lw	$17, 0($4)
-	ori	$16, $28, 0
-	sll	$2, $17, 2
+# was:	sw	_size_reg_9_, 0(_arr_reg_5_)
+	addi	$5, $7, 4
+# was:	addi	_addr_reg_11_, _arr_reg_5_, 4
+	ori	$3, $0, 0
+# was:	ori	_i_reg_12_, $0, 0
+_loop_beg_13_:
+	sub	$4, $3, $2
+# was:	sub	_tmp_reg_15_, _i_reg_12_, _size_reg_9_
+	bgez	$4, _loop_end_14_
+# was:	bgez	_tmp_reg_15_, _loop_end_14_
+	sw	$3, 0($5)
+# was:	sw	_i_reg_12_, 0(_addr_reg_11_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_11_, _addr_reg_11_, 4
+	addi	$3, $3, 1
+# was:	addi	_i_reg_12_, _i_reg_12_, 1
+	j	_loop_beg_13_
+_loop_end_14_:
+	lw	$5, 0($7)
+# was:	lw	_size_reg_4_, 0(_arr_reg_5_)
+# dynalloc
+	ori	$6, $28, 0
+# was:	ori	_letBind_3_, $28, 0
+	sll	$2, $5, 2
+# was:	sll	_tmp_32_, _size_reg_4_, 2
 	addi	$2, $2, 4
+# was:	addi	_tmp_32_, _tmp_32_, 4
 	add	$28, $28, $2
-	sw	$17, 0($16)
-	addi	$19, $16, 4
-	ori	$18, $0, 0
-	ori	$20, $0, 0
-	addi	$21, $4, 4
-_loop_beg_81_:
-	sub	$2, $18, $17
-	bgez	$2, _loop_end_82_
-	lw	$22, 0($21)
-	addi	$21, $21, 4
-	ori	$2, $22, 0
-	jal	isMul16
-	beq	$2, $0, _not_true_83_
-	sw	$22, 0($19)
-	addi	$20, $20, 1
-	addi	$19, $19, 4
-_not_true_83_:
-	addi	$18, $18, 1
-	j	_loop_beg_81_
-_loop_end_82_:
-	sw	$20, 0($16)
-	ori	$2, $16, 0
-	jal	write_int_arr
-	addi	$29, $29, 36
-	lw	$22, -32($29)
+# was:	add	$28, $28, _tmp_32_
+	sw	$5, 0($6)
+# was:	sw	_size_reg_4_, 0(_letBind_3_)
+	addi	$4, $6, 4
+# was:	addi	_addr_reg_17_, _letBind_3_, 4
+	ori	$3, $0, 0
+# was:	ori	_i_reg_18_, $0, 0
+	ori	$2, $0, 0
+# was:	ori	_j_reg_19_, $0, 0
+	addi	$7, $7, 4
+# was:	addi	_elem_reg_6_, _arr_reg_5_, 4
+_loop_beg_20_:
+	sub	$8, $3, $5
+# was:	sub	_tmp_reg_23_, _i_reg_18_, _size_reg_4_
+	bgez	$8, _loop_end_21_
+# was:	bgez	_tmp_reg_23_, _loop_end_21_
+	lw	$10, 0($7)
+# was:	lw	_res_reg_7_, 0(_elem_reg_6_)
+	addi	$7, $7, 4
+# was:	addi	_elem_reg_6_, _elem_reg_6_, 4
+# 	ori	_eq_L_25_,_res_reg_7_,0
+	ori	$9, $10, 0
+# was:	ori	_divide_L_29_, _res_reg_7_, 0
+	ori	$8, $0, 2
+# was:	ori	_divide_R_30_, $0, 2
+	div	$9, $9, $8
+# was:	div	_times_L_27_, _divide_L_29_, _divide_R_30_
+	ori	$8, $0, 2
+# was:	ori	_times_R_28_, $0, 2
+	mul	$9, $9, $8
+# was:	mul	_eq_R_26_, _times_L_27_, _times_R_28_
+	ori	$8, $0, 0
+# was:	ori	_fun_arg_res_24_, $0, 0
+	bne	$10, $9, _false_31_
+# was:	bne	_eq_L_25_, _eq_R_26_, _false_31_
+	ori	$8, $0, 1
+# was:	ori	_fun_arg_res_24_, $0, 1
+_false_31_:
+# 	ori	_bool_reg_8_,_fun_arg_res_24_,0
+	beq	$8, $0, _not_true_22_
+# was:	beq	_bool_reg_8_, $0, _not_true_22_
+	sw	$10, 0($4)
+# was:	sw	_res_reg_7_, 0(_addr_reg_17_)
+	addi	$2, $2, 1
+# was:	addi	_j_reg_19_, _j_reg_19_, 1
+	addi	$4, $4, 4
+# was:	addi	_addr_reg_17_, _addr_reg_17_, 4
+_not_true_22_:
+	addi	$3, $3, 1
+# was:	addi	_i_reg_18_, _i_reg_18_, 1
+	j	_loop_beg_20_
+_loop_end_21_:
+	sw	$2, 0($6)
+# was:	sw	_j_reg_19_, 0(_letBind_3_)
+# map
+	ori	$2, $6, 0
+# was:	ori	_arr_reg_35_, _letBind_3_, 0
+	lw	$3, 0($2)
+# was:	lw	_size_reg_34_, 0(_arr_reg_35_)
+# dynalloc
+	ori	$4, $28, 0
+# was:	ori	_letBind_33_, $28, 0
+	sll	$5, $3, 2
+# was:	sll	_tmp_46_, _size_reg_34_, 2
+	addi	$5, $5, 4
+# was:	addi	_tmp_46_, _tmp_46_, 4
+	add	$28, $28, $5
+# was:	add	$28, $28, _tmp_46_
+	sw	$3, 0($4)
+# was:	sw	_size_reg_34_, 0(_letBind_33_)
+	addi	$6, $4, 4
+# was:	addi	_addr_reg_38_, _letBind_33_, 4
+	ori	$5, $0, 0
+# was:	ori	_i_reg_39_, $0, 0
+	addi	$2, $2, 4
+# was:	addi	_elem_reg_36_, _arr_reg_35_, 4
+_loop_beg_40_:
+	sub	$7, $5, $3
+# was:	sub	_tmp_reg_42_, _i_reg_39_, _size_reg_34_
+	bgez	$7, _loop_end_41_
+# was:	bgez	_tmp_reg_42_, _loop_end_41_
+	lw	$7, 0($2)
+# was:	lw	_res_reg_37_, 0(_elem_reg_36_)
+	addi	$2, $2, 4
+# was:	addi	_elem_reg_36_, _elem_reg_36_, 4
+# 	ori	_times_L_44_,_res_reg_37_,0
+	ori	$8, $7, 0
+# was:	ori	_times_R_45_, _res_reg_37_, 0
+	mul	$7, $7, $8
+# was:	mul	_fun_arg_res_43_, _times_L_44_, _times_R_45_
+# 	ori	_res_reg_37_,_fun_arg_res_43_,0
+	sw	$7, 0($6)
+# was:	sw	_res_reg_37_, 0(_addr_reg_38_)
+	addi	$6, $6, 4
+# was:	addi	_addr_reg_38_, _addr_reg_38_, 4
+	addi	$5, $5, 1
+# was:	addi	_i_reg_39_, _i_reg_39_, 1
+	j	_loop_beg_40_
+_loop_end_41_:
+	ori	$2, $4, 0
+# was:	ori	_arr_reg_49_, _letBind_33_, 0
+	lw	$4, 0($2)
+# was:	lw	_size_reg_48_, 0(_arr_reg_49_)
+# dynalloc
+	ori	$5, $28, 0
+# was:	ori	_letBind_47_, $28, 0
+	sll	$3, $4, 2
+# was:	sll	_tmp_68_, _size_reg_48_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_68_, _tmp_68_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_68_
+	sw	$4, 0($5)
+# was:	sw	_size_reg_48_, 0(_letBind_47_)
+	addi	$7, $5, 4
+# was:	addi	_addr_reg_53_, _letBind_47_, 4
+	ori	$6, $0, 0
+# was:	ori	_i_reg_54_, $0, 0
+	ori	$8, $0, 0
+# was:	ori	_j_reg_55_, $0, 0
+	addi	$9, $2, 4
+# was:	addi	_elem_reg_50_, _arr_reg_49_, 4
+_loop_beg_56_:
+	sub	$2, $6, $4
+# was:	sub	_tmp_reg_59_, _i_reg_54_, _size_reg_48_
+	bgez	$2, _loop_end_57_
+# was:	bgez	_tmp_reg_59_, _loop_end_57_
+	lw	$10, 0($9)
+# was:	lw	_res_reg_51_, 0(_elem_reg_50_)
+	addi	$9, $9, 4
+# was:	addi	_elem_reg_50_, _elem_reg_50_, 4
+# 	ori	_divide_L_65_,_res_reg_51_,0
+	ori	$2, $0, 16
+# was:	ori	_divide_R_66_, $0, 16
+	div	$2, $10, $2
+# was:	div	_times_L_63_, _divide_L_65_, _divide_R_66_
+	ori	$3, $0, 16
+# was:	ori	_times_R_64_, $0, 16
+	mul	$2, $2, $3
+# was:	mul	_eq_L_61_, _times_L_63_, _times_R_64_
+# 	ori	_eq_R_62_,_res_reg_51_,0
+	ori	$3, $0, 0
+# was:	ori	_fun_arg_res_60_, $0, 0
+	bne	$2, $10, _false_67_
+# was:	bne	_eq_L_61_, _eq_R_62_, _false_67_
+	ori	$3, $0, 1
+# was:	ori	_fun_arg_res_60_, $0, 1
+_false_67_:
+# 	ori	_bool_reg_52_,_fun_arg_res_60_,0
+	beq	$3, $0, _not_true_58_
+# was:	beq	_bool_reg_52_, $0, _not_true_58_
+	sw	$10, 0($7)
+# was:	sw	_res_reg_51_, 0(_addr_reg_53_)
+	addi	$8, $8, 1
+# was:	addi	_j_reg_55_, _j_reg_55_, 1
+	addi	$7, $7, 4
+# was:	addi	_addr_reg_53_, _addr_reg_53_, 4
+_not_true_58_:
+	addi	$6, $6, 1
+# was:	addi	_i_reg_54_, _i_reg_54_, 1
+	j	_loop_beg_56_
+_loop_end_57_:
+	sw	$8, 0($5)
+# was:	sw	_j_reg_55_, 0(_letBind_47_)
+# map
+# 	ori	_arr_reg_70_,_letBind_47_,0
+	lw	$16, 0($5)
+# was:	lw	_size_reg_69_, 0(_arr_reg_70_)
+# dynalloc
+	ori	$17, $28, 0
+# was:	ori	_mainres_1_, $28, 0
+	sll	$2, $16, 2
+# was:	sll	_tmp_80_, _size_reg_69_, 2
+	addi	$2, $2, 4
+# was:	addi	_tmp_80_, _tmp_80_, 4
+	add	$28, $28, $2
+# was:	add	$28, $28, _tmp_80_
+	sw	$16, 0($17)
+# was:	sw	_size_reg_69_, 0(_mainres_1_)
+	addi	$18, $17, 4
+# was:	addi	_addr_reg_73_, _mainres_1_, 4
+	ori	$19, $0, 0
+# was:	ori	_i_reg_74_, $0, 0
+	addi	$20, $5, 4
+# was:	addi	_elem_reg_71_, _arr_reg_70_, 4
+_loop_beg_75_:
+	sub	$2, $19, $16
+# was:	sub	_tmp_reg_77_, _i_reg_74_, _size_reg_69_
+	bgez	$2, _loop_end_76_
+# was:	bgez	_tmp_reg_77_, _loop_end_76_
+	lw	$21, 0($20)
+# was:	lw	_res_reg_72_, 0(_elem_reg_71_)
+	addi	$20, $20, 4
+# was:	addi	_elem_reg_71_, _elem_reg_71_, 4
+# 	ori	_tmp_79_,_res_reg_72_,0
+# 	ori	_fun_arg_res_78_,_tmp_79_,0
+	ori	$2, $21, 0
+# was:	ori	$2, _fun_arg_res_78_, 0
+	jal	putint
+# was:	jal	putint, $2
+# 	ori	_res_reg_72_,_fun_arg_res_78_,0
+	sw	$21, 0($18)
+# was:	sw	_res_reg_72_, 0(_addr_reg_73_)
+	addi	$18, $18, 4
+# was:	addi	_addr_reg_73_, _addr_reg_73_, 4
+	addi	$19, $19, 1
+# was:	addi	_i_reg_74_, _i_reg_74_, 1
+	j	_loop_beg_75_
+_loop_end_76_:
+	ori	$2, $17, 0
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 32
 	lw	$21, -28($29)
 	lw	$20, -24($29)
 	lw	$19, -20($29)
@@ -292,6 +391,7 @@ _RuntimeError_:
 	syscall
 	j	_stop_
 	.data	
+# Fixed strings for I/O
 _ErrMsg_:
 	.asciiz	"Runtime error at line "
 _colon_space_:
@@ -300,12 +400,14 @@ _cr_:
 	.asciiz	"\n"
 _space_:
 	.asciiz	" "
+# Message strings for specific errors
 _Msg_IllegalArraySize_:
 	.asciiz	"negative array size"
 _Msg_IllegalIndex_:
 	.asciiz	"array index out of bounds"
 _Msg_DivZero_:
 	.asciiz	"division by zero"
+# String Literals
 	.align	2
 _true:
 	.space	4
diff --git a/tests/inline_map.asm b/tests/inline_map.asm
index e172194..ac4e071 100644
--- a/tests/inline_map.asm
+++ b/tests/inline_map.asm
@@ -17,319 +17,197 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function plus5
-plus5:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_1_,$2,0
-# 	ori	_plus_L_3_,_param_x_1_,0
-	ori	$3, $0, 5
-# was:	ori	_plus_R_4_, $0, 5
-	add	$2, $2, $3
-# was:	add	_plus5res_2_, _plus_L_3_, _plus_R_4_
-# 	ori	$2,_plus5res_2_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function mul2
-mul2:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_5_,$2,0
-	ori	$3, $2, 0
-# was:	ori	_plus_L_7_, _param_x_5_, 0
-# 	ori	_plus_R_8_,_param_x_5_,0
-	add	$2, $3, $2
-# was:	add	_mul2res_6_, _plus_L_7_, _plus_R_8_
-# 	ori	$2,_mul2res_6_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function testcomp
-testcomp:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_9_,$2,0
-# 	ori	_arg_12_,_param_x_9_,0
-# 	ori	$2,_arg_12_,0
-	jal	write_int_arr
-# was:	jal	write_int_arr, $2
-# 	ori	_arg_11_,$2,0
-# 	ori	$2,_arg_11_,0
-	jal	write_int_arr
-# was:	jal	write_int_arr, $2
-# 	ori	_testcompres_10_,$2,0
-# 	ori	$2,_testcompres_10_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function write_int
-write_int:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-# 	ori	_param_x_13_,$2,0
-	ori	$16, $2, 0
-# was:	ori	_tmp_15_, _param_x_13_, 0
-# 	ori	_write_intres_14_,_tmp_15_,0
-	ori	$2, $16, 0
-# was:	ori	$2, _write_intres_14_, 0
-	jal	putint
-# was:	jal	putint, $2
-	ori	$2, $16, 0
-# was:	ori	$2, _write_intres_14_, 0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function write_int_arr
-write_int_arr:
-	sw	$31, -4($29)
-	sw	$20, -24($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -28
-# 	ori	_param_x_16_,$2,0
-# map
-# 	ori	_arr_reg_19_,_param_x_16_,0
-	lw	$16, 0($2)
-# was:	lw	_size_reg_18_, 0(_arr_reg_19_)
-# dynalloc
-	ori	$17, $28, 0
-# was:	ori	_write_int_arrres_17_, $28, 0
-	sll	$3, $16, 2
-# was:	sll	_tmp_28_, _size_reg_18_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_28_, _tmp_28_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_28_
-	sw	$16, 0($17)
-# was:	sw	_size_reg_18_, 0(_write_int_arrres_17_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_22_, _write_int_arrres_17_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_23_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_20_, _arr_reg_19_, 4
-_loop_beg_24_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_26_, _i_reg_23_, _size_reg_18_
-	bgez	$2, _loop_end_25_
-# was:	bgez	_tmp_reg_26_, _loop_end_25_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_21_, 0(_elem_reg_20_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_20_, _elem_reg_20_, 4
-# 	ori	$2,_res_reg_21_,0
-	jal	write_int
-# was:	jal	write_int, $2
-# 	ori	_tmp_reg_27_,$2,0
-# 	ori	_res_reg_21_,_tmp_reg_27_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_21_, 0(_addr_reg_22_)
-	addi	$18, $18, 4
-# was:	addi	_addr_reg_22_, _addr_reg_22_, 4
-	addi	$19, $19, 1
-# was:	addi	_i_reg_23_, _i_reg_23_, 1
-	j	_loop_beg_24_
-_loop_end_25_:
-	ori	$2, $17, 0
-# was:	ori	$2, _write_int_arrres_17_, 0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function boo
-boo:
-	sw	$31, -4($29)
-	sw	$20, -24($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -28
-# 	ori	_param_a_29_,$2,0
-	ori	$0, $0, 8
-# was:	ori	_letBind_32_, $0, 8
-# map
-# 	ori	_arr_reg_34_,_param_a_29_,0
-	lw	$17, 0($2)
-# was:	lw	_size_reg_33_, 0(_arr_reg_34_)
-# dynalloc
-	ori	$16, $28, 0
-# was:	ori	_letBind_31_, $28, 0
-	sll	$3, $17, 2
-# was:	sll	_tmp_43_, _size_reg_33_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_43_, _tmp_43_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_43_
-	sw	$17, 0($16)
-# was:	sw	_size_reg_33_, 0(_letBind_31_)
-	addi	$18, $16, 4
-# was:	addi	_addr_reg_37_, _letBind_31_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_38_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_35_, _arr_reg_34_, 4
-_loop_beg_39_:
-	sub	$2, $19, $17
-# was:	sub	_tmp_reg_41_, _i_reg_38_, _size_reg_33_
-	bgez	$2, _loop_end_40_
-# was:	bgez	_tmp_reg_41_, _loop_end_40_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_36_, 0(_elem_reg_35_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_35_, _elem_reg_35_, 4
-# 	ori	$2,_res_reg_36_,0
-	jal	plus5
-# was:	jal	plus5, $2
-# 	ori	_tmp_reg_42_,$2,0
-# 	ori	_res_reg_36_,_tmp_reg_42_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_36_, 0(_addr_reg_37_)
-	addi	$18, $18, 4
-# was:	addi	_addr_reg_37_, _addr_reg_37_, 4
-	addi	$19, $19, 1
-# was:	addi	_i_reg_38_, _i_reg_38_, 1
-	j	_loop_beg_39_
-_loop_end_40_:
-	ori	$2, $16, 0
-# was:	ori	_boores_30_, _letBind_31_, 0
-# 	ori	$2,_boores_30_,0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
+	sw	$21, -28($29)
 	sw	$20, -24($29)
 	sw	$19, -20($29)
 	sw	$18, -16($29)
 	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -28
+	addi	$29, $29, -32
 	jal	getint
 # was:	jal	getint, $2
-	ori	$3, $2, 0
-# was:	ori	_letBind_45_, $2, 0
-# 	ori	_size_reg_47_,_letBind_45_,0
-	bgez	$3, _safe_lab_48_
-# was:	bgez	_size_reg_47_, _safe_lab_48_
+# 	ori	_letBind_2_,$2,0
+# 	ori	_size_reg_4_,_letBind_2_,0
+	bgez	$2, _safe_lab_5_
+# was:	bgez	_size_reg_4_, _safe_lab_5_
 	ori	$5, $0, 15
 # was:	ori	$5, $0, 15
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_48_:
+_safe_lab_5_:
 # dynalloc
-	ori	$2, $28, 0
-# was:	ori	_letBind_46_, $28, 0
-	sll	$4, $3, 2
-# was:	sll	_tmp_54_, _size_reg_47_, 2
+	ori	$3, $28, 0
+# was:	ori	_letBind_3_, $28, 0
+	sll	$4, $2, 2
+# was:	sll	_tmp_11_, _size_reg_4_, 2
 	addi	$4, $4, 4
-# was:	addi	_tmp_54_, _tmp_54_, 4
+# was:	addi	_tmp_11_, _tmp_11_, 4
 	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_54_
-	sw	$3, 0($2)
-# was:	sw	_size_reg_47_, 0(_letBind_46_)
-	addi	$5, $2, 4
-# was:	addi	_addr_reg_49_, _letBind_46_, 4
-	ori	$6, $0, 0
-# was:	ori	_i_reg_50_, $0, 0
-_loop_beg_51_:
-	sub	$4, $6, $3
-# was:	sub	_tmp_reg_53_, _i_reg_50_, _size_reg_47_
-	bgez	$4, _loop_end_52_
-# was:	bgez	_tmp_reg_53_, _loop_end_52_
-	sw	$6, 0($5)
-# was:	sw	_i_reg_50_, 0(_addr_reg_49_)
+# was:	add	$28, $28, _tmp_11_
+	sw	$2, 0($3)
+# was:	sw	_size_reg_4_, 0(_letBind_3_)
+	addi	$5, $3, 4
+# was:	addi	_addr_reg_6_, _letBind_3_, 4
+	ori	$4, $0, 0
+# was:	ori	_i_reg_7_, $0, 0
+_loop_beg_8_:
+	sub	$6, $4, $2
+# was:	sub	_tmp_reg_10_, _i_reg_7_, _size_reg_4_
+	bgez	$6, _loop_end_9_
+# was:	bgez	_tmp_reg_10_, _loop_end_9_
+	sw	$4, 0($5)
+# was:	sw	_i_reg_7_, 0(_addr_reg_6_)
 	addi	$5, $5, 4
-# was:	addi	_addr_reg_49_, _addr_reg_49_, 4
-	addi	$6, $6, 1
-# was:	addi	_i_reg_50_, _i_reg_50_, 1
-	j	_loop_beg_51_
-_loop_end_52_:
-# 	ori	_plus_L_57_,_letBind_45_,0
-	ori	$4, $3, 0
-# was:	ori	_plus_R_58_, _letBind_45_, 0
-	add	$0, $3, $4
-# was:	add	_letBind_56_, _plus_L_57_, _plus_R_58_
-	ori	$4, $3, 0
-# was:	ori	_plus_L_61_, _letBind_45_, 0
-# 	ori	_plus_R_62_,_letBind_45_,0
-	add	$4, $4, $3
-# was:	add	_plus_L_59_, _plus_L_61_, _plus_R_62_
-# 	ori	_plus_R_60_,_letBind_45_,0
-	add	$0, $4, $3
-# was:	add	_letBind_55_, _plus_L_59_, _plus_R_60_
-# 	ori	_arg_64_,_letBind_46_,0
-# 	ori	$2,_arg_64_,0
-	jal	boo
-# was:	jal	boo, $2
-# 	ori	_letBind_63_,$2,0
+# was:	addi	_addr_reg_6_, _addr_reg_6_, 4
+	addi	$4, $4, 1
+# was:	addi	_i_reg_7_, _i_reg_7_, 1
+	j	_loop_beg_8_
+_loop_end_9_:
 # map
-# 	ori	_arr_reg_67_,_letBind_63_,0
-	lw	$16, 0($2)
-# was:	lw	_size_reg_66_, 0(_arr_reg_67_)
+	ori	$2, $3, 0
+# was:	ori	_arr_reg_15_, _letBind_3_, 0
+	lw	$4, 0($2)
+# was:	lw	_size_reg_14_, 0(_arr_reg_15_)
 # dynalloc
-	ori	$17, $28, 0
-# was:	ori	_letBind_65_, $28, 0
-	sll	$3, $16, 2
-# was:	sll	_tmp_76_, _size_reg_66_, 2
+	ori	$6, $28, 0
+# was:	ori	_letBind_13_, $28, 0
+	sll	$3, $4, 2
+# was:	sll	_tmp_26_, _size_reg_14_, 2
 	addi	$3, $3, 4
-# was:	addi	_tmp_76_, _tmp_76_, 4
+# was:	addi	_tmp_26_, _tmp_26_, 4
 	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_76_
-	sw	$16, 0($17)
-# was:	sw	_size_reg_66_, 0(_letBind_65_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_70_, _letBind_65_, 4
+# was:	add	$28, $28, _tmp_26_
+	sw	$4, 0($6)
+# was:	sw	_size_reg_14_, 0(_letBind_13_)
+	addi	$3, $6, 4
+# was:	addi	_addr_reg_18_, _letBind_13_, 4
+	ori	$5, $0, 0
+# was:	ori	_i_reg_19_, $0, 0
+	addi	$7, $2, 4
+# was:	addi	_elem_reg_16_, _arr_reg_15_, 4
+_loop_beg_20_:
+	sub	$2, $5, $4
+# was:	sub	_tmp_reg_22_, _i_reg_19_, _size_reg_14_
+	bgez	$2, _loop_end_21_
+# was:	bgez	_tmp_reg_22_, _loop_end_21_
+	lw	$2, 0($7)
+# was:	lw	_res_reg_17_, 0(_elem_reg_16_)
+	addi	$7, $7, 4
+# was:	addi	_elem_reg_16_, _elem_reg_16_, 4
+	ori	$8, $2, 0
+# was:	ori	_plus_L_24_, _res_reg_17_, 0
+	ori	$2, $0, 5
+# was:	ori	_plus_R_25_, $0, 5
+	add	$2, $8, $2
+# was:	add	_fun_arg_res_23_, _plus_L_24_, _plus_R_25_
+# 	ori	_res_reg_17_,_fun_arg_res_23_,0
+	sw	$2, 0($3)
+# was:	sw	_res_reg_17_, 0(_addr_reg_18_)
+	addi	$3, $3, 4
+# was:	addi	_addr_reg_18_, _addr_reg_18_, 4
+	addi	$5, $5, 1
+# was:	addi	_i_reg_19_, _i_reg_19_, 1
+	j	_loop_beg_20_
+_loop_end_21_:
+	ori	$2, $6, 0
+# was:	ori	_letBind_12_, _letBind_13_, 0
+# map
+# 	ori	_arr_reg_29_,_letBind_12_,0
+	lw	$4, 0($2)
+# was:	lw	_size_reg_28_, 0(_arr_reg_29_)
+# dynalloc
+	ori	$5, $28, 0
+# was:	ori	_letBind_27_, $28, 0
+	sll	$3, $4, 2
+# was:	sll	_tmp_40_, _size_reg_28_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_40_, _tmp_40_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_40_
+	sw	$4, 0($5)
+# was:	sw	_size_reg_28_, 0(_letBind_27_)
+	addi	$3, $5, 4
+# was:	addi	_addr_reg_32_, _letBind_27_, 4
+	ori	$6, $0, 0
+# was:	ori	_i_reg_33_, $0, 0
+	addi	$7, $2, 4
+# was:	addi	_elem_reg_30_, _arr_reg_29_, 4
+_loop_beg_34_:
+	sub	$2, $6, $4
+# was:	sub	_tmp_reg_36_, _i_reg_33_, _size_reg_28_
+	bgez	$2, _loop_end_35_
+# was:	bgez	_tmp_reg_36_, _loop_end_35_
+	lw	$2, 0($7)
+# was:	lw	_res_reg_31_, 0(_elem_reg_30_)
+	addi	$7, $7, 4
+# was:	addi	_elem_reg_30_, _elem_reg_30_, 4
+	ori	$8, $2, 0
+# was:	ori	_plus_L_38_, _res_reg_31_, 0
+# 	ori	_plus_R_39_,_res_reg_31_,0
+	add	$2, $8, $2
+# was:	add	_fun_arg_res_37_, _plus_L_38_, _plus_R_39_
+# 	ori	_res_reg_31_,_fun_arg_res_37_,0
+	sw	$2, 0($3)
+# was:	sw	_res_reg_31_, 0(_addr_reg_32_)
+	addi	$3, $3, 4
+# was:	addi	_addr_reg_32_, _addr_reg_32_, 4
+	addi	$6, $6, 1
+# was:	addi	_i_reg_33_, _i_reg_33_, 1
+	j	_loop_beg_34_
+_loop_end_35_:
+# map
+# 	ori	_arr_reg_42_,_letBind_27_,0
+	lw	$17, 0($5)
+# was:	lw	_size_reg_41_, 0(_arr_reg_42_)
+# dynalloc
+	ori	$16, $28, 0
+# was:	ori	_mainres_1_, $28, 0
+	sll	$2, $17, 2
+# was:	sll	_tmp_52_, _size_reg_41_, 2
+	addi	$2, $2, 4
+# was:	addi	_tmp_52_, _tmp_52_, 4
+	add	$28, $28, $2
+# was:	add	$28, $28, _tmp_52_
+	sw	$17, 0($16)
+# was:	sw	_size_reg_41_, 0(_mainres_1_)
+	addi	$18, $16, 4
+# was:	addi	_addr_reg_45_, _mainres_1_, 4
 	ori	$19, $0, 0
-# was:	ori	_i_reg_71_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_68_, _arr_reg_67_, 4
-_loop_beg_72_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_74_, _i_reg_71_, _size_reg_66_
-	bgez	$2, _loop_end_73_
-# was:	bgez	_tmp_reg_74_, _loop_end_73_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_69_, 0(_elem_reg_68_)
+# was:	ori	_i_reg_46_, $0, 0
+	addi	$20, $5, 4
+# was:	addi	_elem_reg_43_, _arr_reg_42_, 4
+_loop_beg_47_:
+	sub	$2, $19, $17
+# was:	sub	_tmp_reg_49_, _i_reg_46_, _size_reg_41_
+	bgez	$2, _loop_end_48_
+# was:	bgez	_tmp_reg_49_, _loop_end_48_
+	lw	$21, 0($20)
+# was:	lw	_res_reg_44_, 0(_elem_reg_43_)
 	addi	$20, $20, 4
-# was:	addi	_elem_reg_68_, _elem_reg_68_, 4
-# 	ori	$2,_res_reg_69_,0
-	jal	mul2
-# was:	jal	mul2, $2
-# 	ori	_tmp_reg_75_,$2,0
-# 	ori	_res_reg_69_,_tmp_reg_75_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_69_, 0(_addr_reg_70_)
+# was:	addi	_elem_reg_43_, _elem_reg_43_, 4
+# 	ori	_tmp_51_,_res_reg_44_,0
+# 	ori	_fun_arg_res_50_,_tmp_51_,0
+	ori	$2, $21, 0
+# was:	ori	$2, _fun_arg_res_50_, 0
+	jal	putint
+# was:	jal	putint, $2
+# 	ori	_res_reg_44_,_fun_arg_res_50_,0
+	sw	$21, 0($18)
+# was:	sw	_res_reg_44_, 0(_addr_reg_45_)
 	addi	$18, $18, 4
-# was:	addi	_addr_reg_70_, _addr_reg_70_, 4
+# was:	addi	_addr_reg_45_, _addr_reg_45_, 4
 	addi	$19, $19, 1
-# was:	addi	_i_reg_71_, _i_reg_71_, 1
-	j	_loop_beg_72_
-_loop_end_73_:
-	ori	$2, $17, 0
-# was:	ori	_arg_77_, _letBind_65_, 0
-# 	ori	$2,_arg_77_,0
-	jal	write_int_arr
-# was:	jal	write_int_arr, $2
-# 	ori	_mainres_44_,$2,0
-# 	ori	$2,_mainres_44_,0
-	addi	$29, $29, 28
+# was:	addi	_i_reg_46_, _i_reg_46_, 1
+	j	_loop_beg_47_
+_loop_end_48_:
+	ori	$2, $16, 0
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 32
+	lw	$21, -28($29)
 	lw	$20, -24($29)
 	lw	$19, -20($29)
 	lw	$18, -16($29)
diff --git a/tests/inline_shadow.asm b/tests/inline_shadow.asm
index eaa468b..c654131 100644
--- a/tests/inline_shadow.asm
+++ b/tests/inline_shadow.asm
@@ -17,101 +17,27 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function f
-f:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_a_1_,$2,0
-# 	ori	_param_b_2_,$3,0
-# 	ori	_param_c_3_,$4,0
-# 	ori	_param_d_4_,$5,0
-	ori	$6, $0, 1000
-# was:	ori	_times_L_12_, $0, 1000
-# 	ori	_times_R_13_,_param_a_1_,0
-	mul	$2, $6, $2
-# was:	mul	_plus_L_10_, _times_L_12_, _times_R_13_
-	ori	$6, $0, 100
-# was:	ori	_times_L_14_, $0, 100
-# 	ori	_times_R_15_,_param_b_2_,0
-	mul	$3, $6, $3
-# was:	mul	_plus_R_11_, _times_L_14_, _times_R_15_
-	add	$2, $2, $3
-# was:	add	_plus_L_8_, _plus_L_10_, _plus_R_11_
-	ori	$3, $0, 10
-# was:	ori	_times_L_16_, $0, 10
-# 	ori	_times_R_17_,_param_c_3_,0
-	mul	$3, $3, $4
-# was:	mul	_plus_R_9_, _times_L_16_, _times_R_17_
-	add	$2, $2, $3
-# was:	add	_plus_L_6_, _plus_L_8_, _plus_R_9_
-# 	ori	_plus_R_7_,_param_d_4_,0
-	add	$2, $2, $5
-# was:	add	_fres_5_, _plus_L_6_, _plus_R_7_
-# 	ori	$2,_fres_5_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
 # Function zero
 zero:
 	sw	$31, -4($29)
 	addi	$29, $29, -8
-# 	ori	_param_b_18_,$2,0
-# 	ori	_cond_23_,_param_b_18_,0
-	bne	$2, $0, _then_20_
-# was:	bne	_cond_23_, $0, _then_20_
-	j	_else_21_
-_then_20_:
+# 	ori	_param_b_1_,$2,0
+# 	ori	_cond_6_,_param_b_1_,0
+	bne	$2, $0, _then_3_
+# was:	bne	_cond_6_, $0, _then_3_
+	j	_else_4_
+_then_3_:
 	ori	$2, $0, 0
-# was:	ori	_zerores_19_, $0, 0
-	j	_endif_22_
-_else_21_:
-# 	ori	_arg_24_,_param_b_18_,0
-# 	ori	$2,_arg_24_,0
+# was:	ori	_zerores_2_, $0, 0
+	j	_endif_5_
+_else_4_:
+# 	ori	_arg_7_,_param_b_1_,0
+# 	ori	$2,_arg_7_,0
 	jal	zero
 # was:	jal	zero, $2
-# 	ori	_zerores_19_,$2,0
-_endif_22_:
-# 	ori	$2,_zerores_19_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function test
-test:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_z_25_,$2,0
-	ori	$3, $0, 1
-# was:	ori	_plus_L_28_, $0, 1
-# 	ori	_plus_R_29_,_param_z_25_,0
-	add	$3, $3, $2
-# was:	add	_letBind_27_, _plus_L_28_, _plus_R_29_
-	ori	$4, $0, 2
-# was:	ori	_plus_L_31_, $0, 2
-# 	ori	_plus_R_32_,_param_z_25_,0
-	add	$5, $4, $2
-# was:	add	_letBind_30_, _plus_L_31_, _plus_R_32_
-	ori	$4, $0, 3
-# was:	ori	_plus_L_34_, $0, 3
-# 	ori	_plus_R_35_,_param_z_25_,0
-	add	$4, $4, $2
-# was:	add	_letBind_33_, _plus_L_34_, _plus_R_35_
-	ori	$6, $0, 4
-# was:	ori	_plus_L_37_, $0, 4
-# 	ori	_plus_R_38_,_param_z_25_,0
-	add	$2, $6, $2
-# was:	add	_letBind_36_, _plus_L_37_, _plus_R_38_
-# 	ori	_arg_39_,_letBind_36_,0
-# 	ori	_arg_40_,_letBind_27_,0
-# 	ori	_arg_41_,_letBind_33_,0
-# 	ori	_arg_42_,_letBind_30_,0
-# 	ori	$2,_arg_39_,0
-# 	ori	$3,_arg_40_,0
-# 	ori	$4,_arg_41_,0
-# 	ori	$5,_arg_42_,0
-	jal	f
-# was:	jal	f, $2 $3 $4 $5
-# 	ori	_testres_26_,$2,0
-# 	ori	$2,_testres_26_,0
+# 	ori	_zerores_2_,$2,0
+_endif_5_:
+# 	ori	$2,_zerores_2_,0
 	addi	$29, $29, 8
 	lw	$31, -4($29)
 	jr	$31
@@ -121,43 +47,79 @@ main:
 	sw	$17, -12($29)
 	sw	$16, -8($29)
 	addi	$29, $29, -16
-	ori	$2, $0, 0
-# was:	ori	_arg_46_, $0, 0
-# 	ori	$2,_arg_46_,0
-	jal	test
-# was:	jal	test, $2
-# 	ori	_tmp_45_,$2,0
-	ori	$17, $2, 0
-# was:	ori	_letBind_44_, _tmp_45_, 0
-	ori	$2, $17, 0
-# was:	ori	$2, _letBind_44_, 0
+	ori	$16, $0, 4132
+# was:	ori	_tmp_10_, $0, 4132
+# 	ori	_letBind_9_,_tmp_10_,0
+	ori	$2, $16, 0
+# was:	ori	$2, _letBind_9_, 0
 	jal	putint
 # was:	jal	putint, $2
 	ori	$2, $0, 1
-# was:	ori	_arg_50_, $0, 1
-# 	ori	$2,_arg_50_,0
+# was:	ori	_arg_14_, $0, 1
+# 	ori	$2,_arg_14_,0
 	jal	zero
 # was:	jal	zero, $2
-# 	ori	_arg_49_,$2,0
-# 	ori	$2,_arg_49_,0
-	jal	test
-# was:	jal	test, $2
-# 	ori	_tmp_48_,$2,0
-	ori	$16, $2, 0
-# was:	ori	_letBind_47_, _tmp_48_, 0
-	ori	$2, $16, 0
-# was:	ori	$2, _letBind_47_, 0
+# 	ori	_letBind_13_,$2,0
+	ori	$3, $0, 1
+# was:	ori	_plus_L_16_, $0, 1
+# 	ori	_plus_R_17_,_letBind_13_,0
+	add	$0, $3, $2
+# was:	add	_letBind_15_, _plus_L_16_, _plus_R_17_
+	ori	$3, $0, 2
+# was:	ori	_plus_L_19_, $0, 2
+# 	ori	_plus_R_20_,_letBind_13_,0
+	add	$0, $3, $2
+# was:	add	_letBind_18_, _plus_L_19_, _plus_R_20_
+	ori	$3, $0, 3
+# was:	ori	_plus_L_22_, $0, 3
+# 	ori	_plus_R_23_,_letBind_13_,0
+	add	$3, $3, $2
+# was:	add	_letBind_21_, _plus_L_22_, _plus_R_23_
+	ori	$4, $0, 4
+# was:	ori	_plus_L_25_, $0, 4
+# 	ori	_plus_R_26_,_letBind_13_,0
+	add	$2, $4, $2
+# was:	add	_letBind_24_, _plus_L_25_, _plus_R_26_
+# 	ori	_letBind_27_,_letBind_24_,0
+# 	ori	_letBind_28_,_letBind_27_,0
+# 	ori	_letBind_29_,_letBind_21_,0
+	ori	$4, $0, 1000
+# was:	ori	_times_L_36_, $0, 1000
+	ori	$5, $2, 0
+# was:	ori	_times_R_37_, _letBind_27_, 0
+	mul	$4, $4, $5
+# was:	mul	_plus_L_34_, _times_L_36_, _times_R_37_
+	ori	$5, $0, 100
+# was:	ori	_times_L_38_, $0, 100
+# 	ori	_times_R_39_,_letBind_28_,0
+	mul	$5, $5, $2
+# was:	mul	_plus_R_35_, _times_L_38_, _times_R_39_
+	add	$4, $4, $5
+# was:	add	_plus_L_32_, _plus_L_34_, _plus_R_35_
+	ori	$5, $0, 10
+# was:	ori	_times_L_40_, $0, 10
+# 	ori	_times_R_41_,_letBind_29_,0
+	mul	$3, $5, $3
+# was:	mul	_plus_R_33_, _times_L_40_, _times_R_41_
+	add	$3, $4, $3
+# was:	add	_plus_L_30_, _plus_L_32_, _plus_R_33_
+# 	ori	_plus_R_31_,_letBind_28_,0
+	add	$17, $3, $2
+# was:	add	_tmp_12_, _plus_L_30_, _plus_R_31_
+# 	ori	_letBind_11_,_tmp_12_,0
+	ori	$2, $17, 0
+# was:	ori	$2, _letBind_11_, 0
 	jal	putint
 # was:	jal	putint, $2
 	ori	$2, $0, 10000
-# was:	ori	_times_L_53_, $0, 10000
-# 	ori	_times_R_54_,_letBind_44_,0
-	mul	$2, $2, $17
-# was:	mul	_plus_L_51_, _times_L_53_, _times_R_54_
-# 	ori	_plus_R_52_,_letBind_47_,0
-	add	$2, $2, $16
-# was:	add	_mainres_43_, _plus_L_51_, _plus_R_52_
-# 	ori	$2,_mainres_43_,0
+# was:	ori	_times_L_44_, $0, 10000
+# 	ori	_times_R_45_,_letBind_9_,0
+	mul	$2, $2, $16
+# was:	mul	_plus_L_42_, _times_L_44_, _times_R_45_
+# 	ori	_plus_R_43_,_letBind_11_,0
+	add	$2, $2, $17
+# was:	add	_mainres_8_, _plus_L_42_, _plus_R_43_
+# 	ori	$2,_mainres_8_,0
 	addi	$29, $29, 16
 	lw	$17, -12($29)
 	lw	$16, -8($29)
diff --git a/tests/inline_shadow.out-testresult b/tests/inline_shadow.out-testresult
new file mode 100644
index 0000000..d974f8f
--- /dev/null
+++ b/tests/inline_shadow.out-testresult
@@ -0,0 +1 @@
+4132 4434 
diff --git a/tests/io_mssp.asm b/tests/io_mssp.asm
index aa9fc3b..33822f9 100644
--- a/tests/io_mssp.asm
+++ b/tests/io_mssp.asm
@@ -1,42 +1,30 @@
 	.text	0x00400000
 	.globl	main
 	la	$28, _heap_
-	la	$4, _aaMSSPa_210_
-# was:	la	_aaMSSPa_210__addr, _aaMSSPa_210_
+	la	$4, _aaMSSPa_194_
+# was:	la	_aaMSSPa_194__addr, _aaMSSPa_194_
 	ori	$3, $0, 18
-# was:	ori	_aaMSSPa_210__init, $0, 18
+# was:	ori	_aaMSSPa_194__init, $0, 18
 	sw	$3, 0($4)
-# was:	sw	_aaMSSPa_210__init, 0(_aaMSSPa_210__addr)
-	la	$4, _aaa__st_59_
-# was:	la	_aaa__st_59__addr, _aaa__st_59_
-	ori	$3, $0, 3
-# was:	ori	_aaa__st_59__init, $0, 3
-	sw	$3, 0($4)
-# was:	sw	_aaa__st_59__init, 0(_aaa__st_59__addr)
-	la	$4, _aaa__st_44_
-# was:	la	_aaa__st_44__addr, _aaa__st_44_
-	ori	$3, $0, 3
-# was:	ori	_aaa__st_44__init, $0, 3
-	sw	$3, 0($4)
-# was:	sw	_aaa__st_44__init, 0(_aaa__st_44__addr)
-	la	$4, _a__str__14_
-# was:	la	_a__str__14__addr, _a__str__14_
+# was:	sw	_aaMSSPa_194__init, 0(_aaMSSPa_194__addr)
+	la	$4, _a__str__34_
+# was:	la	_a__str__34__addr, _a__str__34_
 	ori	$3, $0, 1
-# was:	ori	_a__str__14__init, $0, 1
+# was:	ori	_a__str__34__init, $0, 1
 	sw	$3, 0($4)
-# was:	sw	_a__str__14__init, 0(_a__str__14__addr)
-	la	$4, _aa__str_10_
-# was:	la	_aa__str_10__addr, _aa__str_10_
+# was:	sw	_a__str__34__init, 0(_a__str__34__addr)
+	la	$4, _aa__str_30_
+# was:	la	_aa__str_30__addr, _aa__str_30_
 	ori	$3, $0, 2
-# was:	ori	_aa__str_10__init, $0, 2
+# was:	ori	_aa__str_30__init, $0, 2
 	sw	$3, 0($4)
-# was:	sw	_aa__str_10__init, 0(_aa__str_10__addr)
-	la	$4, _Introdu_5_
-# was:	la	_Introdu_5__addr, _Introdu_5_
+# was:	sw	_aa__str_30__init, 0(_aa__str_30__addr)
+	la	$4, _Introdu_25_
+# was:	la	_Introdu_25__addr, _Introdu_25_
 	ori	$3, $0, 17
-# was:	ori	_Introdu_5__init, $0, 17
+# was:	ori	_Introdu_25__init, $0, 17
 	sw	$3, 0($4)
-# was:	sw	_Introdu_5__init, 0(_Introdu_5__addr)
+# was:	sw	_Introdu_25__init, 0(_Introdu_25__addr)
 	la	$4, _true
 # was:	la	_true_addr, _true
 	ori	$3, $0, 4
@@ -53,907 +41,727 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function read_int
-read_int:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-	ori	$16, $2, 0
-# was:	ori	_param_i_1_, $2, 0
-	la	$2, _Introdu_5_
-# was:	la	_tmp_4_, _Introdu_5_
-# _Introdu_5_: string "Introduce number "
-# 	ori	_letBind_3_,_tmp_4_,0
-# 	ori	$2,_tmp_4_,0
-	jal	putstring
-# was:	jal	putstring, $2
-	ori	$2, $16, 0
-# was:	ori	_tmp_7_, _param_i_1_, 0
-# 	ori	_letBind_6_,_tmp_7_,0
-# 	ori	$2,_letBind_6_,0
-	jal	putint
-# was:	jal	putint, $2
-	la	$2, _aa__str_10_
-# was:	la	_tmp_9_, _aa__str_10_
-# _aa__str_10_: string ": "
-# 	ori	_letBind_8_,_tmp_9_,0
-# 	ori	$2,_tmp_9_,0
-	jal	putstring
-# was:	jal	putstring, $2
-	jal	getint
-# was:	jal	getint, $2
-	ori	$16, $2, 0
-# was:	ori	_letBind_11_, $2, 0
-	la	$2, _a__str__14_
-# was:	la	_tmp_13_, _a__str__14_
-# _a__str__14_: string "\n"
-# 	ori	_letBind_12_,_tmp_13_,0
-# 	ori	$2,_tmp_13_,0
-	jal	putstring
-# was:	jal	putstring, $2
-	ori	$2, $16, 0
-# was:	ori	_read_intres_2_, _letBind_11_, 0
-# 	ori	$2,_read_intres_2_,0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function read_int_arr
-read_int_arr:
+# Function main
+main:
 	sw	$31, -4($29)
+	sw	$21, -28($29)
 	sw	$20, -24($29)
 	sw	$19, -20($29)
 	sw	$18, -16($29)
 	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -28
-# 	ori	_param_n_15_,$2,0
-# 	ori	_size_reg_18_,_param_n_15_,0
-	bgez	$2, _safe_lab_19_
-# was:	bgez	_size_reg_18_, _safe_lab_19_
+	addi	$29, $29, -32
+	ori	$3, $0, 8
+# was:	ori	_size_reg_5_, $0, 8
+	bgez	$3, _safe_lab_6_
+# was:	bgez	_size_reg_5_, _safe_lab_6_
 	ori	$5, $0, 10
 # was:	ori	$5, $0, 10
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_19_:
+_safe_lab_6_:
 # dynalloc
-	ori	$3, $28, 0
-# was:	ori	_letBind_17_, $28, 0
-	sll	$4, $2, 2
-# was:	sll	_tmp_25_, _size_reg_18_, 2
+	ori	$2, $28, 0
+# was:	ori	_letBind_4_, $28, 0
+	sll	$4, $3, 2
+# was:	sll	_tmp_12_, _size_reg_5_, 2
 	addi	$4, $4, 4
-# was:	addi	_tmp_25_, _tmp_25_, 4
+# was:	addi	_tmp_12_, _tmp_12_, 4
 	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_25_
-	sw	$2, 0($3)
-# was:	sw	_size_reg_18_, 0(_letBind_17_)
-	addi	$6, $3, 4
-# was:	addi	_addr_reg_20_, _letBind_17_, 4
-	ori	$5, $0, 0
-# was:	ori	_i_reg_21_, $0, 0
-_loop_beg_22_:
-	sub	$4, $5, $2
-# was:	sub	_tmp_reg_24_, _i_reg_21_, _size_reg_18_
-	bgez	$4, _loop_end_23_
-# was:	bgez	_tmp_reg_24_, _loop_end_23_
-	sw	$5, 0($6)
-# was:	sw	_i_reg_21_, 0(_addr_reg_20_)
-	addi	$6, $6, 4
-# was:	addi	_addr_reg_20_, _addr_reg_20_, 4
-	addi	$5, $5, 1
-# was:	addi	_i_reg_21_, _i_reg_21_, 1
-	j	_loop_beg_22_
-_loop_end_23_:
+# was:	add	$28, $28, _tmp_12_
+	sw	$3, 0($2)
+# was:	sw	_size_reg_5_, 0(_letBind_4_)
+	addi	$5, $2, 4
+# was:	addi	_addr_reg_7_, _letBind_4_, 4
+	ori	$6, $0, 0
+# was:	ori	_i_reg_8_, $0, 0
+_loop_beg_9_:
+	sub	$4, $6, $3
+# was:	sub	_tmp_reg_11_, _i_reg_8_, _size_reg_5_
+	bgez	$4, _loop_end_10_
+# was:	bgez	_tmp_reg_11_, _loop_end_10_
+	sw	$6, 0($5)
+# was:	sw	_i_reg_8_, 0(_addr_reg_7_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_7_, _addr_reg_7_, 4
+	addi	$6, $6, 1
+# was:	addi	_i_reg_8_, _i_reg_8_, 1
+	j	_loop_beg_9_
+_loop_end_10_:
 # map
-	ori	$2, $3, 0
-# was:	ori	_arr_reg_27_, _letBind_17_, 0
+# 	ori	_arr_reg_14_,_letBind_4_,0
 	lw	$17, 0($2)
-# was:	lw	_size_reg_26_, 0(_arr_reg_27_)
+# was:	lw	_size_reg_13_, 0(_arr_reg_14_)
 # dynalloc
 	ori	$16, $28, 0
-# was:	ori	_read_int_arrres_16_, $28, 0
+# was:	ori	_letBind_3_, $28, 0
 	sll	$3, $17, 2
-# was:	sll	_tmp_36_, _size_reg_26_, 2
+# was:	sll	_tmp_35_, _size_reg_13_, 2
 	addi	$3, $3, 4
-# was:	addi	_tmp_36_, _tmp_36_, 4
+# was:	addi	_tmp_35_, _tmp_35_, 4
 	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_36_
+# was:	add	$28, $28, _tmp_35_
 	sw	$17, 0($16)
-# was:	sw	_size_reg_26_, 0(_read_int_arrres_16_)
+# was:	sw	_size_reg_13_, 0(_letBind_3_)
 	addi	$18, $16, 4
-# was:	addi	_addr_reg_30_, _read_int_arrres_16_, 4
+# was:	addi	_addr_reg_17_, _letBind_3_, 4
 	ori	$19, $0, 0
-# was:	ori	_i_reg_31_, $0, 0
+# was:	ori	_i_reg_18_, $0, 0
 	addi	$20, $2, 4
-# was:	addi	_elem_reg_28_, _arr_reg_27_, 4
-_loop_beg_32_:
+# was:	addi	_elem_reg_15_, _arr_reg_14_, 4
+_loop_beg_19_:
 	sub	$2, $19, $17
-# was:	sub	_tmp_reg_34_, _i_reg_31_, _size_reg_26_
-	bgez	$2, _loop_end_33_
-# was:	bgez	_tmp_reg_34_, _loop_end_33_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_29_, 0(_elem_reg_28_)
+# was:	sub	_tmp_reg_21_, _i_reg_18_, _size_reg_13_
+	bgez	$2, _loop_end_20_
+# was:	bgez	_tmp_reg_21_, _loop_end_20_
+	lw	$21, 0($20)
+# was:	lw	_res_reg_16_, 0(_elem_reg_15_)
 	addi	$20, $20, 4
-# was:	addi	_elem_reg_28_, _elem_reg_28_, 4
-# 	ori	$2,_res_reg_29_,0
-	jal	read_int
-# was:	jal	read_int, $2
-# 	ori	_tmp_reg_35_,$2,0
-# 	ori	_res_reg_29_,_tmp_reg_35_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_29_, 0(_addr_reg_30_)
-	addi	$18, $18, 4
-# was:	addi	_addr_reg_30_, _addr_reg_30_, 4
-	addi	$19, $19, 1
-# was:	addi	_i_reg_31_, _i_reg_31_, 1
-	j	_loop_beg_32_
-_loop_end_33_:
-	ori	$2, $16, 0
-# was:	ori	$2, _read_int_arrres_16_, 0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function write_int
-write_int:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-# 	ori	_param_i_37_,$2,0
-	ori	$16, $2, 0
-# was:	ori	_tmp_39_, _param_i_37_, 0
-# 	ori	_write_intres_38_,_tmp_39_,0
-	ori	$2, $16, 0
-# was:	ori	$2, _write_intres_38_, 0
+# was:	addi	_elem_reg_15_, _elem_reg_15_, 4
+	la	$2, _Introdu_25_
+# was:	la	_tmp_24_, _Introdu_25_
+# _Introdu_25_: string "Introduce number "
+# 	ori	_letBind_23_,_tmp_24_,0
+# 	ori	$2,_tmp_24_,0
+	jal	putstring
+# was:	jal	putstring, $2
+# 	ori	_tmp_27_,_res_reg_16_,0
+	ori	$2, $21, 0
+# was:	ori	_letBind_26_, _tmp_27_, 0
+# 	ori	$2,_letBind_26_,0
 	jal	putint
 # was:	jal	putint, $2
-	ori	$2, $16, 0
-# was:	ori	$2, _write_intres_38_, 0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function write_int_arr
-write_int_arr:
-	sw	$31, -4($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -24
-	ori	$16, $2, 0
-# was:	ori	_param_arr_40_, $2, 0
-	la	$2, _aaa__st_44_
-# was:	la	_tmp_43_, _aaa__st_44_
-# _aaa__st_44_: string " { "
-# 	ori	_letBind_42_,_tmp_43_,0
-# 	ori	$2,_tmp_43_,0
+	la	$2, _aa__str_30_
+# was:	la	_tmp_29_, _aa__str_30_
+# _aa__str_30_: string ": "
+# 	ori	_letBind_28_,_tmp_29_,0
+# 	ori	$2,_tmp_29_,0
 	jal	putstring
 # was:	jal	putstring, $2
+	jal	getint
+# was:	jal	getint, $2
+	ori	$21, $2, 0
+# was:	ori	_letBind_31_, $2, 0
+	la	$2, _a__str__34_
+# was:	la	_tmp_33_, _a__str__34_
+# _a__str__34_: string "\n"
+# 	ori	_letBind_32_,_tmp_33_,0
+# 	ori	$2,_tmp_33_,0
+	jal	putstring
+# was:	jal	putstring, $2
+# 	ori	_fun_arg_res_22_,_letBind_31_,0
+# 	ori	_res_reg_16_,_fun_arg_res_22_,0
+	sw	$21, 0($18)
+# was:	sw	_res_reg_16_, 0(_addr_reg_17_)
+	addi	$18, $18, 4
+# was:	addi	_addr_reg_17_, _addr_reg_17_, 4
+	addi	$19, $19, 1
+# was:	addi	_i_reg_18_, _i_reg_18_, 1
+	j	_loop_beg_19_
+_loop_end_20_:
 # map
-	ori	$2, $16, 0
-# was:	ori	_arr_reg_47_, _param_arr_40_, 0
-	lw	$16, 0($2)
-# was:	lw	_size_reg_46_, 0(_arr_reg_47_)
-# dynalloc
-	ori	$3, $28, 0
-# was:	ori	_letBind_45_, $28, 0
-	sll	$4, $16, 2
-# was:	sll	_tmp_56_, _size_reg_46_, 2
-	addi	$4, $4, 4
-# was:	addi	_tmp_56_, _tmp_56_, 4
-	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_56_
-	sw	$16, 0($3)
-# was:	sw	_size_reg_46_, 0(_letBind_45_)
-	addi	$17, $3, 4
-# was:	addi	_addr_reg_50_, _letBind_45_, 4
-	ori	$18, $0, 0
-# was:	ori	_i_reg_51_, $0, 0
-	addi	$19, $2, 4
-# was:	addi	_elem_reg_48_, _arr_reg_47_, 4
-_loop_beg_52_:
-	sub	$2, $18, $16
-# was:	sub	_tmp_reg_54_, _i_reg_51_, _size_reg_46_
-	bgez	$2, _loop_end_53_
-# was:	bgez	_tmp_reg_54_, _loop_end_53_
-	lw	$2, 0($19)
-# was:	lw	_res_reg_49_, 0(_elem_reg_48_)
-	addi	$19, $19, 4
-# was:	addi	_elem_reg_48_, _elem_reg_48_, 4
-# 	ori	$2,_res_reg_49_,0
-	jal	write_int
-# was:	jal	write_int, $2
-# 	ori	_tmp_reg_55_,$2,0
-# 	ori	_res_reg_49_,_tmp_reg_55_,0
-	sw	$2, 0($17)
-# was:	sw	_res_reg_49_, 0(_addr_reg_50_)
-	addi	$17, $17, 4
-# was:	addi	_addr_reg_50_, _addr_reg_50_, 4
-	addi	$18, $18, 1
-# was:	addi	_i_reg_51_, _i_reg_51_, 1
-	j	_loop_beg_52_
-_loop_end_53_:
-	la	$2, _aaa__st_59_
-# was:	la	_tmp_58_, _aaa__st_59_
-# _aaa__st_59_: string " }\n"
-# 	ori	_letBind_57_,_tmp_58_,0
-# 	ori	$2,_tmp_58_,0
-	jal	putstring
-# was:	jal	putstring, $2
-	ori	$2, $0, 1
-# was:	ori	_write_int_arrres_41_, $0, 1
-# 	ori	$2,_write_int_arrres_41_,0
-	addi	$29, $29, 24
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function max
-max:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_60_,$2,0
-# 	ori	_param_y_61_,$3,0
-# 	ori	_lt_L_67_,_param_x_60_,0
-# 	ori	_lt_R_68_,_param_y_61_,0
-	slt	$4, $2, $3
-# was:	slt	_cond_66_, _lt_L_67_, _lt_R_68_
-	bne	$4, $0, _then_63_
-# was:	bne	_cond_66_, $0, _then_63_
-	j	_else_64_
-_then_63_:
-	ori	$2, $3, 0
-# was:	ori	_maxres_62_, _param_y_61_, 0
-	j	_endif_65_
-_else_64_:
-# 	ori	_maxres_62_,_param_x_60_,0
-_endif_65_:
-# 	ori	$2,_maxres_62_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function mapper
-mapper:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-	ori	$16, $2, 0
-# was:	ori	_param_x_69_, $2, 0
-	ori	$2, $16, 0
-# was:	ori	_arg_72_, _param_x_69_, 0
-	ori	$3, $0, 0
-# was:	ori	_arg_73_, $0, 0
-# 	ori	$2,_arg_72_,0
-# 	ori	$3,_arg_73_,0
-	jal	max
-# was:	jal	max, $2 $3
-# 	ori	_letBind_71_,$2,0
-	ori	$5, $0, 4
-# was:	ori	_size_reg_74_, $0, 4
-# dynalloc
-	ori	$3, $28, 0
-# was:	ori	_mapperres_70_, $28, 0
-	sll	$4, $5, 2
-# was:	sll	_tmp_77_, _size_reg_74_, 2
-	addi	$4, $4, 4
-# was:	addi	_tmp_77_, _tmp_77_, 4
-	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_77_
-	sw	$5, 0($3)
-# was:	sw	_size_reg_74_, 0(_mapperres_70_)
-	addi	$4, $3, 4
-# was:	addi	_addr_reg_75_, _mapperres_70_, 4
-# 	ori	_tmp_reg_76_,_letBind_71_,0
-	sw	$2, 0($4)
-# was:	sw	_tmp_reg_76_, 0(_addr_reg_75_)
-	addi	$4, $4, 4
-# was:	addi	_addr_reg_75_, _addr_reg_75_, 4
-# 	ori	_tmp_reg_76_,_letBind_71_,0
-	sw	$2, 0($4)
-# was:	sw	_tmp_reg_76_, 0(_addr_reg_75_)
-	addi	$4, $4, 4
-# was:	addi	_addr_reg_75_, _addr_reg_75_, 4
-# 	ori	_tmp_reg_76_,_letBind_71_,0
-	sw	$2, 0($4)
-# was:	sw	_tmp_reg_76_, 0(_addr_reg_75_)
-	addi	$4, $4, 4
-# was:	addi	_addr_reg_75_, _addr_reg_75_, 4
-	ori	$2, $16, 0
-# was:	ori	_tmp_reg_76_, _param_x_69_, 0
-	sw	$2, 0($4)
-# was:	sw	_tmp_reg_76_, 0(_addr_reg_75_)
-	addi	$4, $4, 4
-# was:	addi	_addr_reg_75_, _addr_reg_75_, 4
-	ori	$2, $3, 0
-# was:	ori	$2, _mapperres_70_, 0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function reducer
-reducer:
-	sw	$31, -4($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -24
-	ori	$18, $2, 0
-# was:	ori	_param_a_78_, $2, 0
-	ori	$16, $3, 0
-# was:	ori	_param_b_79_, $3, 0
-	ori	$3, $0, 0
-# was:	ori	_arr_ind_84_, $0, 0
-	addi	$2, $18, 4
-# was:	addi	_arr_reg_85_, _param_a_78_, 4
-	lw	$4, 0($18)
-# was:	lw	_size_reg_86_, 0(_param_a_78_)
-	bgez	$3, _safe_lab_89_
-# was:	bgez	_arr_ind_84_, _safe_lab_89_
-_error_lab_88_:
-	ori	$5, $0, 28
-# was:	ori	$5, $0, 28
-	la	$6, _Msg_IllegalIndex_
-# was:	la	$6, _Msg_IllegalIndex_
-	j	_RuntimeError_
-_safe_lab_89_:
-	sub	$4, $3, $4
-# was:	sub	_tmp_reg_87_, _arr_ind_84_, _size_reg_86_
-	bgez	$4, _error_lab_88_
-# was:	bgez	_tmp_reg_87_, _error_lab_88_
-	sll	$3, $3, 2
-# was:	sll	_arr_ind_84_, _arr_ind_84_, 2
-	add	$2, $2, $3
-# was:	add	_arr_reg_85_, _arr_reg_85_, _arr_ind_84_
-	lw	$2, 0($2)
-# was:	lw	_arg_83_, 0(_arr_reg_85_)
-	ori	$3, $0, 0
-# was:	ori	_arr_ind_91_, $0, 0
-	addi	$4, $16, 4
-# was:	addi	_arr_reg_92_, _param_b_79_, 4
+# 	ori	_arr_reg_38_,_letBind_3_,0
 	lw	$5, 0($16)
-# was:	lw	_size_reg_93_, 0(_param_b_79_)
-	bgez	$3, _safe_lab_96_
-# was:	bgez	_arr_ind_91_, _safe_lab_96_
-_error_lab_95_:
-	ori	$5, $0, 28
-# was:	ori	$5, $0, 28
-	la	$6, _Msg_IllegalIndex_
-# was:	la	$6, _Msg_IllegalIndex_
-	j	_RuntimeError_
-_safe_lab_96_:
-	sub	$5, $3, $5
-# was:	sub	_tmp_reg_94_, _arr_ind_91_, _size_reg_93_
-	bgez	$5, _error_lab_95_
-# was:	bgez	_tmp_reg_94_, _error_lab_95_
-	sll	$3, $3, 2
-# was:	sll	_arr_ind_91_, _arr_ind_91_, 2
-	add	$4, $4, $3
-# was:	add	_arr_reg_92_, _arr_reg_92_, _arr_ind_91_
-	lw	$3, 0($4)
-# was:	lw	_arg_90_, 0(_arr_reg_92_)
-# 	ori	$2,_arg_83_,0
-# 	ori	$3,_arg_90_,0
-	jal	max
-# was:	jal	max, $2 $3
-# 	ori	_arg_82_,$2,0
-	ori	$5, $0, 2
-# was:	ori	_arr_ind_100_, $0, 2
-	addi	$4, $18, 4
-# was:	addi	_arr_reg_101_, _param_a_78_, 4
-	lw	$3, 0($18)
-# was:	lw	_size_reg_102_, 0(_param_a_78_)
-	bgez	$5, _safe_lab_105_
-# was:	bgez	_arr_ind_100_, _safe_lab_105_
-_error_lab_104_:
-	ori	$5, $0, 28
-# was:	ori	$5, $0, 28
-	la	$6, _Msg_IllegalIndex_
-# was:	la	$6, _Msg_IllegalIndex_
-	j	_RuntimeError_
-_safe_lab_105_:
-	sub	$3, $5, $3
-# was:	sub	_tmp_reg_103_, _arr_ind_100_, _size_reg_102_
-	bgez	$3, _error_lab_104_
-# was:	bgez	_tmp_reg_103_, _error_lab_104_
-	sll	$5, $5, 2
-# was:	sll	_arr_ind_100_, _arr_ind_100_, 2
-	add	$4, $4, $5
-# was:	add	_arr_reg_101_, _arr_reg_101_, _arr_ind_100_
-	lw	$3, 0($4)
-# was:	lw	_plus_L_98_, 0(_arr_reg_101_)
-	ori	$5, $0, 1
-# was:	ori	_arr_ind_106_, $0, 1
-	addi	$4, $16, 4
-# was:	addi	_arr_reg_107_, _param_b_79_, 4
-	lw	$6, 0($16)
-# was:	lw	_size_reg_108_, 0(_param_b_79_)
-	bgez	$5, _safe_lab_111_
-# was:	bgez	_arr_ind_106_, _safe_lab_111_
-_error_lab_110_:
-	ori	$5, $0, 28
-# was:	ori	$5, $0, 28
-	la	$6, _Msg_IllegalIndex_
-# was:	la	$6, _Msg_IllegalIndex_
-	j	_RuntimeError_
-_safe_lab_111_:
-	sub	$6, $5, $6
-# was:	sub	_tmp_reg_109_, _arr_ind_106_, _size_reg_108_
-	bgez	$6, _error_lab_110_
-# was:	bgez	_tmp_reg_109_, _error_lab_110_
-	sll	$5, $5, 2
-# was:	sll	_arr_ind_106_, _arr_ind_106_, 2
-	add	$4, $4, $5
-# was:	add	_arr_reg_107_, _arr_reg_107_, _arr_ind_106_
-	lw	$4, 0($4)
-# was:	lw	_plus_R_99_, 0(_arr_reg_107_)
-	add	$3, $3, $4
-# was:	add	_arg_97_, _plus_L_98_, _plus_R_99_
-# 	ori	$2,_arg_82_,0
-# 	ori	$3,_arg_97_,0
-	jal	max
-# was:	jal	max, $2 $3
-	ori	$17, $2, 0
-# was:	ori	_letBind_81_, $2, 0
-	ori	$3, $0, 1
-# was:	ori	_arr_ind_114_, $0, 1
-	addi	$2, $18, 4
-# was:	addi	_arr_reg_115_, _param_a_78_, 4
-	lw	$4, 0($18)
-# was:	lw	_size_reg_116_, 0(_param_a_78_)
-	bgez	$3, _safe_lab_119_
-# was:	bgez	_arr_ind_114_, _safe_lab_119_
-_error_lab_118_:
-	ori	$5, $0, 29
-# was:	ori	$5, $0, 29
-	la	$6, _Msg_IllegalIndex_
-# was:	la	$6, _Msg_IllegalIndex_
-	j	_RuntimeError_
-_safe_lab_119_:
-	sub	$4, $3, $4
-# was:	sub	_tmp_reg_117_, _arr_ind_114_, _size_reg_116_
-	bgez	$4, _error_lab_118_
-# was:	bgez	_tmp_reg_117_, _error_lab_118_
-	sll	$3, $3, 2
-# was:	sll	_arr_ind_114_, _arr_ind_114_, 2
-	add	$2, $2, $3
-# was:	add	_arr_reg_115_, _arr_reg_115_, _arr_ind_114_
-	lw	$4, 0($2)
-# was:	lw	_arg_113_, 0(_arr_reg_115_)
-	ori	$2, $0, 3
-# was:	ori	_arr_ind_123_, $0, 3
-	addi	$3, $18, 4
-# was:	addi	_arr_reg_124_, _param_a_78_, 4
-	lw	$5, 0($18)
-# was:	lw	_size_reg_125_, 0(_param_a_78_)
-	bgez	$2, _safe_lab_128_
-# was:	bgez	_arr_ind_123_, _safe_lab_128_
-_error_lab_127_:
-	ori	$5, $0, 29
-# was:	ori	$5, $0, 29
-	la	$6, _Msg_IllegalIndex_
-# was:	la	$6, _Msg_IllegalIndex_
-	j	_RuntimeError_
-_safe_lab_128_:
-	sub	$5, $2, $5
-# was:	sub	_tmp_reg_126_, _arr_ind_123_, _size_reg_125_
-	bgez	$5, _error_lab_127_
-# was:	bgez	_tmp_reg_126_, _error_lab_127_
-	sll	$2, $2, 2
-# was:	sll	_arr_ind_123_, _arr_ind_123_, 2
-	add	$3, $3, $2
-# was:	add	_arr_reg_124_, _arr_reg_124_, _arr_ind_123_
-	lw	$5, 0($3)
-# was:	lw	_plus_L_121_, 0(_arr_reg_124_)
-	ori	$2, $0, 1
-# was:	ori	_arr_ind_129_, $0, 1
-	addi	$3, $16, 4
-# was:	addi	_arr_reg_130_, _param_b_79_, 4
-	lw	$6, 0($16)
-# was:	lw	_size_reg_131_, 0(_param_b_79_)
-	bgez	$2, _safe_lab_134_
-# was:	bgez	_arr_ind_129_, _safe_lab_134_
-_error_lab_133_:
-	ori	$5, $0, 29
-# was:	ori	$5, $0, 29
-	la	$6, _Msg_IllegalIndex_
-# was:	la	$6, _Msg_IllegalIndex_
-	j	_RuntimeError_
-_safe_lab_134_:
-	sub	$6, $2, $6
-# was:	sub	_tmp_reg_132_, _arr_ind_129_, _size_reg_131_
-	bgez	$6, _error_lab_133_
-# was:	bgez	_tmp_reg_132_, _error_lab_133_
-	sll	$2, $2, 2
-# was:	sll	_arr_ind_129_, _arr_ind_129_, 2
-	add	$3, $3, $2
-# was:	add	_arr_reg_130_, _arr_reg_130_, _arr_ind_129_
-	lw	$2, 0($3)
-# was:	lw	_plus_R_122_, 0(_arr_reg_130_)
-	add	$3, $5, $2
-# was:	add	_arg_120_, _plus_L_121_, _plus_R_122_
+# was:	lw	_size_reg_37_, 0(_arr_reg_38_)
+# dynalloc
+	ori	$4, $28, 0
+# was:	ori	_letBind_36_, $28, 0
+	sll	$2, $5, 2
+# was:	sll	_tmp_59_, _size_reg_37_, 2
+	addi	$2, $2, 4
+# was:	addi	_tmp_59_, _tmp_59_, 4
+	add	$28, $28, $2
+# was:	add	$28, $28, _tmp_59_
+	sw	$5, 0($4)
+# was:	sw	_size_reg_37_, 0(_letBind_36_)
+	addi	$7, $4, 4
+# was:	addi	_addr_reg_41_, _letBind_36_, 4
+	ori	$6, $0, 0
+# was:	ori	_i_reg_42_, $0, 0
+	addi	$8, $16, 4
+# was:	addi	_elem_reg_39_, _arr_reg_38_, 4
+_loop_beg_43_:
+	sub	$2, $6, $5
+# was:	sub	_tmp_reg_45_, _i_reg_42_, _size_reg_37_
+	bgez	$2, _loop_end_44_
+# was:	bgez	_tmp_reg_45_, _loop_end_44_
+	lw	$9, 0($8)
+# was:	lw	_res_reg_40_, 0(_elem_reg_39_)
+	addi	$8, $8, 4
+# was:	addi	_elem_reg_39_, _elem_reg_39_, 4
+	ori	$3, $9, 0
+# was:	ori	_letBind_48_, _res_reg_40_, 0
+# 	ori	_lt_L_53_,_letBind_48_,0
+	ori	$2, $0, 0
+# was:	ori	_lt_R_54_, $0, 0
+	slt	$2, $3, $2
+# was:	slt	_cond_52_, _lt_L_53_, _lt_R_54_
+	bne	$2, $0, _then_49_
+# was:	bne	_cond_52_, $0, _then_49_
+	j	_else_50_
+_then_49_:
+	ori	$3, $0, 0
+# was:	ori	_letBind_47_, $0, 0
+	j	_endif_51_
+_else_50_:
+# 	ori	_letBind_47_,_letBind_48_,0
+_endif_51_:
+	ori	$2, $0, 4
+# was:	ori	_size_reg_55_, $0, 4
+# dynalloc
+	ori	$10, $28, 0
+# was:	ori	_fun_arg_res_46_, $28, 0
+	sll	$11, $2, 2
+# was:	sll	_tmp_58_, _size_reg_55_, 2
+	addi	$11, $11, 4
+# was:	addi	_tmp_58_, _tmp_58_, 4
+	add	$28, $28, $11
+# was:	add	$28, $28, _tmp_58_
+	sw	$2, 0($10)
+# was:	sw	_size_reg_55_, 0(_fun_arg_res_46_)
+	addi	$2, $10, 4
+# was:	addi	_addr_reg_56_, _fun_arg_res_46_, 4
+# 	ori	_tmp_reg_57_,_letBind_47_,0
+	sw	$3, 0($2)
+# was:	sw	_tmp_reg_57_, 0(_addr_reg_56_)
+	addi	$2, $2, 4
+# was:	addi	_addr_reg_56_, _addr_reg_56_, 4
+# 	ori	_tmp_reg_57_,_letBind_47_,0
+	sw	$3, 0($2)
+# was:	sw	_tmp_reg_57_, 0(_addr_reg_56_)
+	addi	$2, $2, 4
+# was:	addi	_addr_reg_56_, _addr_reg_56_, 4
+# 	ori	_tmp_reg_57_,_letBind_47_,0
+	sw	$3, 0($2)
+# was:	sw	_tmp_reg_57_, 0(_addr_reg_56_)
+	addi	$2, $2, 4
+# was:	addi	_addr_reg_56_, _addr_reg_56_, 4
+	ori	$3, $9, 0
+# was:	ori	_tmp_reg_57_, _res_reg_40_, 0
+	sw	$3, 0($2)
+# was:	sw	_tmp_reg_57_, 0(_addr_reg_56_)
+	addi	$2, $2, 4
+# was:	addi	_addr_reg_56_, _addr_reg_56_, 4
+	ori	$9, $10, 0
+# was:	ori	_res_reg_40_, _fun_arg_res_46_, 0
+	sw	$9, 0($7)
+# was:	sw	_res_reg_40_, 0(_addr_reg_41_)
+	addi	$7, $7, 4
+# was:	addi	_addr_reg_41_, _addr_reg_41_, 4
+	addi	$6, $6, 1
+# was:	addi	_i_reg_42_, _i_reg_42_, 1
+	j	_loop_beg_43_
+_loop_end_44_:
+	ori	$2, $0, 4
+# was:	ori	_size_reg_61_, $0, 4
+# dynalloc
+	ori	$16, $28, 0
+# was:	ori	_letBind_60_, $28, 0
+	sll	$3, $2, 2
+# was:	sll	_tmp_64_, _size_reg_61_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_64_, _tmp_64_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_64_
+	sw	$2, 0($16)
+# was:	sw	_size_reg_61_, 0(_letBind_60_)
+	addi	$2, $16, 4
+# was:	addi	_addr_reg_62_, _letBind_60_, 4
+	ori	$3, $0, 0
+# was:	ori	_tmp_reg_63_, $0, 0
+	sw	$3, 0($2)
+# was:	sw	_tmp_reg_63_, 0(_addr_reg_62_)
+	addi	$2, $2, 4
+# was:	addi	_addr_reg_62_, _addr_reg_62_, 4
+	ori	$3, $0, 0
+# was:	ori	_tmp_reg_63_, $0, 0
+	sw	$3, 0($2)
+# was:	sw	_tmp_reg_63_, 0(_addr_reg_62_)
+	addi	$2, $2, 4
+# was:	addi	_addr_reg_62_, _addr_reg_62_, 4
+	ori	$3, $0, 0
+# was:	ori	_tmp_reg_63_, $0, 0
+	sw	$3, 0($2)
+# was:	sw	_tmp_reg_63_, 0(_addr_reg_62_)
+	addi	$2, $2, 4
+# was:	addi	_addr_reg_62_, _addr_reg_62_, 4
+	ori	$3, $0, 0
+# was:	ori	_tmp_reg_63_, $0, 0
+	sw	$3, 0($2)
+# was:	sw	_tmp_reg_63_, 0(_addr_reg_62_)
+	addi	$2, $2, 4
+# was:	addi	_addr_reg_62_, _addr_reg_62_, 4
 	ori	$2, $4, 0
-# was:	ori	$2, _arg_113_, 0
-# 	ori	$3,_arg_120_,0
-	jal	max
-# was:	jal	max, $2 $3
-	ori	$19, $2, 0
-# was:	ori	_letBind_112_, $2, 0
-	ori	$2, $0, 2
-# was:	ori	_arr_ind_139_, $0, 2
-	addi	$3, $18, 4
-# was:	addi	_arr_reg_140_, _param_a_78_, 4
-	lw	$4, 0($18)
-# was:	lw	_size_reg_141_, 0(_param_a_78_)
-	bgez	$2, _safe_lab_144_
-# was:	bgez	_arr_ind_139_, _safe_lab_144_
-_error_lab_143_:
+# was:	ori	_arr_reg_65_, _letBind_36_, 0
+	lw	$3, 0($2)
+# was:	lw	_size_reg_66_, 0(_arr_reg_65_)
+# 	ori	_letBind_2_,_letBind_60_,0
+	addi	$2, $2, 4
+# was:	addi	_arr_reg_65_, _arr_reg_65_, 4
+	ori	$4, $0, 0
+# was:	ori	_ind_var_67_, $0, 0
+_loop_beg_69_:
+	sub	$5, $4, $3
+# was:	sub	_tmp_reg_68_, _ind_var_67_, _size_reg_66_
+	bgez	$5, _loop_end_70_
+# was:	bgez	_tmp_reg_68_, _loop_end_70_
+	lw	$5, 0($2)
+# was:	lw	_tmp_reg_68_, 0(_arr_reg_65_)
+	addi	$2, $2, 4
+# was:	addi	_arr_reg_65_, _arr_reg_65_, 4
+	ori	$7, $0, 0
+# was:	ori	_arr_ind_75_, $0, 0
+	addi	$6, $16, 4
+# was:	addi	_arr_reg_76_, _letBind_2_, 4
+	lw	$8, 0($16)
+# was:	lw	_size_reg_77_, 0(_letBind_2_)
+	bgez	$7, _safe_lab_80_
+# was:	bgez	_arr_ind_75_, _safe_lab_80_
+_error_lab_79_:
+	ori	$5, $0, 28
+# was:	ori	$5, $0, 28
+	la	$6, _Msg_IllegalIndex_
+# was:	la	$6, _Msg_IllegalIndex_
+	j	_RuntimeError_
+_safe_lab_80_:
+	sub	$8, $7, $8
+# was:	sub	_tmp_reg_78_, _arr_ind_75_, _size_reg_77_
+	bgez	$8, _error_lab_79_
+# was:	bgez	_tmp_reg_78_, _error_lab_79_
+	sll	$7, $7, 2
+# was:	sll	_arr_ind_75_, _arr_ind_75_, 2
+	add	$6, $6, $7
+# was:	add	_arr_reg_76_, _arr_reg_76_, _arr_ind_75_
+	lw	$8, 0($6)
+# was:	lw	_letBind_74_, 0(_arr_reg_76_)
+	ori	$6, $0, 0
+# was:	ori	_arr_ind_82_, $0, 0
+	addi	$7, $5, 4
+# was:	addi	_arr_reg_83_, _tmp_reg_68_, 4
+	lw	$9, 0($5)
+# was:	lw	_size_reg_84_, 0(_tmp_reg_68_)
+	bgez	$6, _safe_lab_87_
+# was:	bgez	_arr_ind_82_, _safe_lab_87_
+_error_lab_86_:
+	ori	$5, $0, 28
+# was:	ori	$5, $0, 28
+	la	$6, _Msg_IllegalIndex_
+# was:	la	$6, _Msg_IllegalIndex_
+	j	_RuntimeError_
+_safe_lab_87_:
+	sub	$9, $6, $9
+# was:	sub	_tmp_reg_85_, _arr_ind_82_, _size_reg_84_
+	bgez	$9, _error_lab_86_
+# was:	bgez	_tmp_reg_85_, _error_lab_86_
+	sll	$6, $6, 2
+# was:	sll	_arr_ind_82_, _arr_ind_82_, 2
+	add	$7, $7, $6
+# was:	add	_arr_reg_83_, _arr_reg_83_, _arr_ind_82_
+	lw	$7, 0($7)
+# was:	lw	_letBind_81_, 0(_arr_reg_83_)
+# 	ori	_lt_L_92_,_letBind_74_,0
+# 	ori	_lt_R_93_,_letBind_81_,0
+	slt	$6, $8, $7
+# was:	slt	_cond_91_, _lt_L_92_, _lt_R_93_
+	bne	$6, $0, _then_88_
+# was:	bne	_cond_91_, $0, _then_88_
+	j	_else_89_
+_then_88_:
+# 	ori	_letBind_73_,_letBind_81_,0
+	j	_endif_90_
+_else_89_:
+	ori	$7, $8, 0
+# was:	ori	_letBind_73_, _letBind_74_, 0
+_endif_90_:
+	ori	$8, $0, 2
+# was:	ori	_arr_ind_97_, $0, 2
+	addi	$6, $16, 4
+# was:	addi	_arr_reg_98_, _letBind_2_, 4
+	lw	$9, 0($16)
+# was:	lw	_size_reg_99_, 0(_letBind_2_)
+	bgez	$8, _safe_lab_102_
+# was:	bgez	_arr_ind_97_, _safe_lab_102_
+_error_lab_101_:
+	ori	$5, $0, 28
+# was:	ori	$5, $0, 28
+	la	$6, _Msg_IllegalIndex_
+# was:	la	$6, _Msg_IllegalIndex_
+	j	_RuntimeError_
+_safe_lab_102_:
+	sub	$9, $8, $9
+# was:	sub	_tmp_reg_100_, _arr_ind_97_, _size_reg_99_
+	bgez	$9, _error_lab_101_
+# was:	bgez	_tmp_reg_100_, _error_lab_101_
+	sll	$8, $8, 2
+# was:	sll	_arr_ind_97_, _arr_ind_97_, 2
+	add	$6, $6, $8
+# was:	add	_arr_reg_98_, _arr_reg_98_, _arr_ind_97_
+	lw	$9, 0($6)
+# was:	lw	_plus_L_95_, 0(_arr_reg_98_)
+	ori	$6, $0, 1
+# was:	ori	_arr_ind_103_, $0, 1
+	addi	$8, $5, 4
+# was:	addi	_arr_reg_104_, _tmp_reg_68_, 4
+	lw	$10, 0($5)
+# was:	lw	_size_reg_105_, 0(_tmp_reg_68_)
+	bgez	$6, _safe_lab_108_
+# was:	bgez	_arr_ind_103_, _safe_lab_108_
+_error_lab_107_:
+	ori	$5, $0, 28
+# was:	ori	$5, $0, 28
+	la	$6, _Msg_IllegalIndex_
+# was:	la	$6, _Msg_IllegalIndex_
+	j	_RuntimeError_
+_safe_lab_108_:
+	sub	$10, $6, $10
+# was:	sub	_tmp_reg_106_, _arr_ind_103_, _size_reg_105_
+	bgez	$10, _error_lab_107_
+# was:	bgez	_tmp_reg_106_, _error_lab_107_
+	sll	$6, $6, 2
+# was:	sll	_arr_ind_103_, _arr_ind_103_, 2
+	add	$8, $8, $6
+# was:	add	_arr_reg_104_, _arr_reg_104_, _arr_ind_103_
+	lw	$6, 0($8)
+# was:	lw	_plus_R_96_, 0(_arr_reg_104_)
+	add	$6, $9, $6
+# was:	add	_letBind_94_, _plus_L_95_, _plus_R_96_
+# 	ori	_lt_L_113_,_letBind_73_,0
+# 	ori	_lt_R_114_,_letBind_94_,0
+	slt	$8, $7, $6
+# was:	slt	_cond_112_, _lt_L_113_, _lt_R_114_
+	bne	$8, $0, _then_109_
+# was:	bne	_cond_112_, $0, _then_109_
+	j	_else_110_
+_then_109_:
+# 	ori	_letBind_72_,_letBind_94_,0
+	j	_endif_111_
+_else_110_:
+	ori	$6, $7, 0
+# was:	ori	_letBind_72_, _letBind_73_, 0
+_endif_111_:
+	ori	$8, $0, 1
+# was:	ori	_arr_ind_117_, $0, 1
+	addi	$7, $16, 4
+# was:	addi	_arr_reg_118_, _letBind_2_, 4
+	lw	$9, 0($16)
+# was:	lw	_size_reg_119_, 0(_letBind_2_)
+	bgez	$8, _safe_lab_122_
+# was:	bgez	_arr_ind_117_, _safe_lab_122_
+_error_lab_121_:
+	ori	$5, $0, 29
+# was:	ori	$5, $0, 29
+	la	$6, _Msg_IllegalIndex_
+# was:	la	$6, _Msg_IllegalIndex_
+	j	_RuntimeError_
+_safe_lab_122_:
+	sub	$9, $8, $9
+# was:	sub	_tmp_reg_120_, _arr_ind_117_, _size_reg_119_
+	bgez	$9, _error_lab_121_
+# was:	bgez	_tmp_reg_120_, _error_lab_121_
+	sll	$8, $8, 2
+# was:	sll	_arr_ind_117_, _arr_ind_117_, 2
+	add	$7, $7, $8
+# was:	add	_arr_reg_118_, _arr_reg_118_, _arr_ind_117_
+	lw	$7, 0($7)
+# was:	lw	_letBind_116_, 0(_arr_reg_118_)
+	ori	$9, $0, 3
+# was:	ori	_arr_ind_126_, $0, 3
+	addi	$8, $16, 4
+# was:	addi	_arr_reg_127_, _letBind_2_, 4
+	lw	$10, 0($16)
+# was:	lw	_size_reg_128_, 0(_letBind_2_)
+	bgez	$9, _safe_lab_131_
+# was:	bgez	_arr_ind_126_, _safe_lab_131_
+_error_lab_130_:
+	ori	$5, $0, 29
+# was:	ori	$5, $0, 29
+	la	$6, _Msg_IllegalIndex_
+# was:	la	$6, _Msg_IllegalIndex_
+	j	_RuntimeError_
+_safe_lab_131_:
+	sub	$10, $9, $10
+# was:	sub	_tmp_reg_129_, _arr_ind_126_, _size_reg_128_
+	bgez	$10, _error_lab_130_
+# was:	bgez	_tmp_reg_129_, _error_lab_130_
+	sll	$9, $9, 2
+# was:	sll	_arr_ind_126_, _arr_ind_126_, 2
+	add	$8, $8, $9
+# was:	add	_arr_reg_127_, _arr_reg_127_, _arr_ind_126_
+	lw	$8, 0($8)
+# was:	lw	_plus_L_124_, 0(_arr_reg_127_)
+	ori	$10, $0, 1
+# was:	ori	_arr_ind_132_, $0, 1
+	addi	$9, $5, 4
+# was:	addi	_arr_reg_133_, _tmp_reg_68_, 4
+	lw	$11, 0($5)
+# was:	lw	_size_reg_134_, 0(_tmp_reg_68_)
+	bgez	$10, _safe_lab_137_
+# was:	bgez	_arr_ind_132_, _safe_lab_137_
+_error_lab_136_:
+	ori	$5, $0, 29
+# was:	ori	$5, $0, 29
+	la	$6, _Msg_IllegalIndex_
+# was:	la	$6, _Msg_IllegalIndex_
+	j	_RuntimeError_
+_safe_lab_137_:
+	sub	$11, $10, $11
+# was:	sub	_tmp_reg_135_, _arr_ind_132_, _size_reg_134_
+	bgez	$11, _error_lab_136_
+# was:	bgez	_tmp_reg_135_, _error_lab_136_
+	sll	$10, $10, 2
+# was:	sll	_arr_ind_132_, _arr_ind_132_, 2
+	add	$9, $9, $10
+# was:	add	_arr_reg_133_, _arr_reg_133_, _arr_ind_132_
+	lw	$9, 0($9)
+# was:	lw	_plus_R_125_, 0(_arr_reg_133_)
+	add	$8, $8, $9
+# was:	add	_letBind_123_, _plus_L_124_, _plus_R_125_
+# 	ori	_lt_L_142_,_letBind_116_,0
+# 	ori	_lt_R_143_,_letBind_123_,0
+	slt	$9, $7, $8
+# was:	slt	_cond_141_, _lt_L_142_, _lt_R_143_
+	bne	$9, $0, _then_138_
+# was:	bne	_cond_141_, $0, _then_138_
+	j	_else_139_
+_then_138_:
+	ori	$7, $8, 0
+# was:	ori	_letBind_115_, _letBind_123_, 0
+	j	_endif_140_
+_else_139_:
+# 	ori	_letBind_115_,_letBind_116_,0
+_endif_140_:
+	ori	$8, $0, 2
+# was:	ori	_arr_ind_148_, $0, 2
+	addi	$9, $16, 4
+# was:	addi	_arr_reg_149_, _letBind_2_, 4
+	lw	$10, 0($16)
+# was:	lw	_size_reg_150_, 0(_letBind_2_)
+	bgez	$8, _safe_lab_153_
+# was:	bgez	_arr_ind_148_, _safe_lab_153_
+_error_lab_152_:
 	ori	$5, $0, 30
 # was:	ori	$5, $0, 30
 	la	$6, _Msg_IllegalIndex_
 # was:	la	$6, _Msg_IllegalIndex_
 	j	_RuntimeError_
-_safe_lab_144_:
-	sub	$4, $2, $4
-# was:	sub	_tmp_reg_142_, _arr_ind_139_, _size_reg_141_
-	bgez	$4, _error_lab_143_
-# was:	bgez	_tmp_reg_142_, _error_lab_143_
-	sll	$2, $2, 2
-# was:	sll	_arr_ind_139_, _arr_ind_139_, 2
-	add	$3, $3, $2
-# was:	add	_arr_reg_140_, _arr_reg_140_, _arr_ind_139_
-	lw	$2, 0($3)
-# was:	lw	_plus_L_137_, 0(_arr_reg_140_)
-	ori	$3, $0, 3
-# was:	ori	_arr_ind_145_, $0, 3
-	addi	$4, $16, 4
-# was:	addi	_arr_reg_146_, _param_b_79_, 4
-	lw	$5, 0($16)
-# was:	lw	_size_reg_147_, 0(_param_b_79_)
-	bgez	$3, _safe_lab_150_
-# was:	bgez	_arr_ind_145_, _safe_lab_150_
-_error_lab_149_:
+_safe_lab_153_:
+	sub	$10, $8, $10
+# was:	sub	_tmp_reg_151_, _arr_ind_148_, _size_reg_150_
+	bgez	$10, _error_lab_152_
+# was:	bgez	_tmp_reg_151_, _error_lab_152_
+	sll	$8, $8, 2
+# was:	sll	_arr_ind_148_, _arr_ind_148_, 2
+	add	$9, $9, $8
+# was:	add	_arr_reg_149_, _arr_reg_149_, _arr_ind_148_
+	lw	$10, 0($9)
+# was:	lw	_plus_L_146_, 0(_arr_reg_149_)
+	ori	$8, $0, 3
+# was:	ori	_arr_ind_154_, $0, 3
+	addi	$9, $5, 4
+# was:	addi	_arr_reg_155_, _tmp_reg_68_, 4
+	lw	$11, 0($5)
+# was:	lw	_size_reg_156_, 0(_tmp_reg_68_)
+	bgez	$8, _safe_lab_159_
+# was:	bgez	_arr_ind_154_, _safe_lab_159_
+_error_lab_158_:
 	ori	$5, $0, 30
 # was:	ori	$5, $0, 30
 	la	$6, _Msg_IllegalIndex_
 # was:	la	$6, _Msg_IllegalIndex_
 	j	_RuntimeError_
-_safe_lab_150_:
-	sub	$5, $3, $5
-# was:	sub	_tmp_reg_148_, _arr_ind_145_, _size_reg_147_
-	bgez	$5, _error_lab_149_
-# was:	bgez	_tmp_reg_148_, _error_lab_149_
-	sll	$3, $3, 2
-# was:	sll	_arr_ind_145_, _arr_ind_145_, 2
-	add	$4, $4, $3
-# was:	add	_arr_reg_146_, _arr_reg_146_, _arr_ind_145_
-	lw	$3, 0($4)
-# was:	lw	_plus_R_138_, 0(_arr_reg_146_)
-	add	$2, $2, $3
-# was:	add	_arg_136_, _plus_L_137_, _plus_R_138_
-	ori	$3, $0, 2
-# was:	ori	_arr_ind_152_, $0, 2
-	addi	$4, $16, 4
-# was:	addi	_arr_reg_153_, _param_b_79_, 4
-	lw	$5, 0($16)
-# was:	lw	_size_reg_154_, 0(_param_b_79_)
-	bgez	$3, _safe_lab_157_
-# was:	bgez	_arr_ind_152_, _safe_lab_157_
-_error_lab_156_:
-	ori	$5, $0, 30
-# was:	ori	$5, $0, 30
-	la	$6, _Msg_IllegalIndex_
-# was:	la	$6, _Msg_IllegalIndex_
-	j	_RuntimeError_
-_safe_lab_157_:
-	sub	$5, $3, $5
-# was:	sub	_tmp_reg_155_, _arr_ind_152_, _size_reg_154_
-	bgez	$5, _error_lab_156_
-# was:	bgez	_tmp_reg_155_, _error_lab_156_
-	sll	$3, $3, 2
-# was:	sll	_arr_ind_152_, _arr_ind_152_, 2
-	add	$4, $4, $3
-# was:	add	_arr_reg_153_, _arr_reg_153_, _arr_ind_152_
-	lw	$3, 0($4)
-# was:	lw	_arg_151_, 0(_arr_reg_153_)
-# 	ori	$2,_arg_136_,0
-# 	ori	$3,_arg_151_,0
-	jal	max
-# was:	jal	max, $2 $3
-# 	ori	_letBind_135_,$2,0
-	ori	$4, $0, 3
-# was:	ori	_arr_ind_161_, $0, 3
-	addi	$3, $18, 4
-# was:	addi	_arr_reg_162_, _param_a_78_, 4
-	lw	$5, 0($18)
-# was:	lw	_size_reg_163_, 0(_param_a_78_)
-	bgez	$4, _safe_lab_166_
+_safe_lab_159_:
+	sub	$11, $8, $11
+# was:	sub	_tmp_reg_157_, _arr_ind_154_, _size_reg_156_
+	bgez	$11, _error_lab_158_
+# was:	bgez	_tmp_reg_157_, _error_lab_158_
+	sll	$8, $8, 2
+# was:	sll	_arr_ind_154_, _arr_ind_154_, 2
+	add	$9, $9, $8
+# was:	add	_arr_reg_155_, _arr_reg_155_, _arr_ind_154_
+	lw	$8, 0($9)
+# was:	lw	_plus_R_147_, 0(_arr_reg_155_)
+	add	$8, $10, $8
+# was:	add	_letBind_145_, _plus_L_146_, _plus_R_147_
+	ori	$9, $0, 2
+# was:	ori	_arr_ind_161_, $0, 2
+	addi	$10, $5, 4
+# was:	addi	_arr_reg_162_, _tmp_reg_68_, 4
+	lw	$11, 0($5)
+# was:	lw	_size_reg_163_, 0(_tmp_reg_68_)
+	bgez	$9, _safe_lab_166_
 # was:	bgez	_arr_ind_161_, _safe_lab_166_
 _error_lab_165_:
-	ori	$5, $0, 31
-# was:	ori	$5, $0, 31
+	ori	$5, $0, 30
+# was:	ori	$5, $0, 30
 	la	$6, _Msg_IllegalIndex_
 # was:	la	$6, _Msg_IllegalIndex_
 	j	_RuntimeError_
 _safe_lab_166_:
-	sub	$5, $4, $5
+	sub	$11, $9, $11
 # was:	sub	_tmp_reg_164_, _arr_ind_161_, _size_reg_163_
-	bgez	$5, _error_lab_165_
+	bgez	$11, _error_lab_165_
 # was:	bgez	_tmp_reg_164_, _error_lab_165_
-	sll	$4, $4, 2
+	sll	$9, $9, 2
 # was:	sll	_arr_ind_161_, _arr_ind_161_, 2
-	add	$3, $3, $4
+	add	$10, $10, $9
 # was:	add	_arr_reg_162_, _arr_reg_162_, _arr_ind_161_
-	lw	$5, 0($3)
-# was:	lw	_plus_L_159_, 0(_arr_reg_162_)
-	ori	$4, $0, 3
-# was:	ori	_arr_ind_167_, $0, 3
-	addi	$3, $16, 4
-# was:	addi	_arr_reg_168_, _param_b_79_, 4
-	lw	$6, 0($16)
-# was:	lw	_size_reg_169_, 0(_param_b_79_)
-	bgez	$4, _safe_lab_172_
-# was:	bgez	_arr_ind_167_, _safe_lab_172_
-_error_lab_171_:
+	lw	$9, 0($10)
+# was:	lw	_letBind_160_, 0(_arr_reg_162_)
+# 	ori	_lt_L_171_,_letBind_145_,0
+# 	ori	_lt_R_172_,_letBind_160_,0
+	slt	$10, $8, $9
+# was:	slt	_cond_170_, _lt_L_171_, _lt_R_172_
+	bne	$10, $0, _then_167_
+# was:	bne	_cond_170_, $0, _then_167_
+	j	_else_168_
+_then_167_:
+	ori	$8, $9, 0
+# was:	ori	_letBind_144_, _letBind_160_, 0
+	j	_endif_169_
+_else_168_:
+# 	ori	_letBind_144_,_letBind_145_,0
+_endif_169_:
+	ori	$10, $0, 3
+# was:	ori	_arr_ind_176_, $0, 3
+	addi	$9, $16, 4
+# was:	addi	_arr_reg_177_, _letBind_2_, 4
+	lw	$11, 0($16)
+# was:	lw	_size_reg_178_, 0(_letBind_2_)
+	bgez	$10, _safe_lab_181_
+# was:	bgez	_arr_ind_176_, _safe_lab_181_
+_error_lab_180_:
 	ori	$5, $0, 31
 # was:	ori	$5, $0, 31
 	la	$6, _Msg_IllegalIndex_
 # was:	la	$6, _Msg_IllegalIndex_
 	j	_RuntimeError_
-_safe_lab_172_:
-	sub	$6, $4, $6
-# was:	sub	_tmp_reg_170_, _arr_ind_167_, _size_reg_169_
-	bgez	$6, _error_lab_171_
-# was:	bgez	_tmp_reg_170_, _error_lab_171_
-	sll	$4, $4, 2
-# was:	sll	_arr_ind_167_, _arr_ind_167_, 2
-	add	$3, $3, $4
-# was:	add	_arr_reg_168_, _arr_reg_168_, _arr_ind_167_
-	lw	$3, 0($3)
-# was:	lw	_plus_R_160_, 0(_arr_reg_168_)
-	add	$3, $5, $3
-# was:	add	_letBind_158_, _plus_L_159_, _plus_R_160_
-	ori	$6, $0, 4
-# was:	ori	_size_reg_173_, $0, 4
-# dynalloc
-	ori	$5, $28, 0
-# was:	ori	_reducerres_80_, $28, 0
-	sll	$4, $6, 2
-# was:	sll	_tmp_176_, _size_reg_173_, 2
-	addi	$4, $4, 4
-# was:	addi	_tmp_176_, _tmp_176_, 4
-	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_176_
-	sw	$6, 0($5)
-# was:	sw	_size_reg_173_, 0(_reducerres_80_)
-	addi	$4, $5, 4
-# was:	addi	_addr_reg_174_, _reducerres_80_, 4
-# 	ori	_tmp_reg_175_,_letBind_81_,0
-	sw	$17, 0($4)
-# was:	sw	_tmp_reg_175_, 0(_addr_reg_174_)
-	addi	$4, $4, 4
-# was:	addi	_addr_reg_174_, _addr_reg_174_, 4
-	ori	$17, $19, 0
-# was:	ori	_tmp_reg_175_, _letBind_112_, 0
-	sw	$17, 0($4)
-# was:	sw	_tmp_reg_175_, 0(_addr_reg_174_)
-	addi	$4, $4, 4
-# was:	addi	_addr_reg_174_, _addr_reg_174_, 4
-	ori	$17, $2, 0
-# was:	ori	_tmp_reg_175_, _letBind_135_, 0
-	sw	$17, 0($4)
-# was:	sw	_tmp_reg_175_, 0(_addr_reg_174_)
-	addi	$4, $4, 4
-# was:	addi	_addr_reg_174_, _addr_reg_174_, 4
-	ori	$17, $3, 0
-# was:	ori	_tmp_reg_175_, _letBind_158_, 0
-	sw	$17, 0($4)
-# was:	sw	_tmp_reg_175_, 0(_addr_reg_174_)
-	addi	$4, $4, 4
-# was:	addi	_addr_reg_174_, _addr_reg_174_, 4
-	ori	$2, $5, 0
-# was:	ori	$2, _reducerres_80_, 0
-	addi	$29, $29, 24
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function mssp
-mssp:
-	sw	$31, -4($29)
-	sw	$20, -24($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -28
-# 	ori	_param_n_177_,$2,0
-# 	ori	_arg_180_,_param_n_177_,0
-# 	ori	$2,_arg_180_,0
-	jal	read_int_arr
-# was:	jal	read_int_arr, $2
-# 	ori	_letBind_179_,$2,0
-# map
-# 	ori	_arr_reg_183_,_letBind_179_,0
-	lw	$17, 0($2)
-# was:	lw	_size_reg_182_, 0(_arr_reg_183_)
+_safe_lab_181_:
+	sub	$11, $10, $11
+# was:	sub	_tmp_reg_179_, _arr_ind_176_, _size_reg_178_
+	bgez	$11, _error_lab_180_
+# was:	bgez	_tmp_reg_179_, _error_lab_180_
+	sll	$10, $10, 2
+# was:	sll	_arr_ind_176_, _arr_ind_176_, 2
+	add	$9, $9, $10
+# was:	add	_arr_reg_177_, _arr_reg_177_, _arr_ind_176_
+	lw	$10, 0($9)
+# was:	lw	_plus_L_174_, 0(_arr_reg_177_)
+	ori	$11, $0, 3
+# was:	ori	_arr_ind_182_, $0, 3
+	addi	$9, $5, 4
+# was:	addi	_arr_reg_183_, _tmp_reg_68_, 4
+	lw	$5, 0($5)
+# was:	lw	_size_reg_184_, 0(_tmp_reg_68_)
+	bgez	$11, _safe_lab_187_
+# was:	bgez	_arr_ind_182_, _safe_lab_187_
+_error_lab_186_:
+	ori	$5, $0, 31
+# was:	ori	$5, $0, 31
+	la	$6, _Msg_IllegalIndex_
+# was:	la	$6, _Msg_IllegalIndex_
+	j	_RuntimeError_
+_safe_lab_187_:
+	sub	$5, $11, $5
+# was:	sub	_tmp_reg_185_, _arr_ind_182_, _size_reg_184_
+	bgez	$5, _error_lab_186_
+# was:	bgez	_tmp_reg_185_, _error_lab_186_
+	sll	$11, $11, 2
+# was:	sll	_arr_ind_182_, _arr_ind_182_, 2
+	add	$9, $9, $11
+# was:	add	_arr_reg_183_, _arr_reg_183_, _arr_ind_182_
+	lw	$5, 0($9)
+# was:	lw	_plus_R_175_, 0(_arr_reg_183_)
+	add	$9, $10, $5
+# was:	add	_letBind_173_, _plus_L_174_, _plus_R_175_
+	ori	$5, $0, 4
+# was:	ori	_size_reg_188_, $0, 4
 # dynalloc
 	ori	$16, $28, 0
-# was:	ori	_letBind_181_, $28, 0
-	sll	$3, $17, 2
-# was:	sll	_tmp_192_, _size_reg_182_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_192_, _tmp_192_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_192_
-	sw	$17, 0($16)
-# was:	sw	_size_reg_182_, 0(_letBind_181_)
-	addi	$19, $16, 4
-# was:	addi	_addr_reg_186_, _letBind_181_, 4
-	ori	$18, $0, 0
-# was:	ori	_i_reg_187_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_184_, _arr_reg_183_, 4
-_loop_beg_188_:
-	sub	$2, $18, $17
-# was:	sub	_tmp_reg_190_, _i_reg_187_, _size_reg_182_
-	bgez	$2, _loop_end_189_
-# was:	bgez	_tmp_reg_190_, _loop_end_189_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_185_, 0(_elem_reg_184_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_184_, _elem_reg_184_, 4
-# 	ori	$2,_res_reg_185_,0
-	jal	mapper
-# was:	jal	mapper, $2
-# 	ori	_tmp_reg_191_,$2,0
-# 	ori	_res_reg_185_,_tmp_reg_191_,0
-	sw	$2, 0($19)
-# was:	sw	_res_reg_185_, 0(_addr_reg_186_)
-	addi	$19, $19, 4
-# was:	addi	_addr_reg_186_, _addr_reg_186_, 4
-	addi	$18, $18, 1
-# was:	addi	_i_reg_187_, _i_reg_187_, 1
-	j	_loop_beg_188_
-_loop_end_189_:
-	ori	$3, $0, 4
-# was:	ori	_size_reg_194_, $0, 4
-# dynalloc
-	ori	$2, $28, 0
-# was:	ori	_letBind_193_, $28, 0
-	sll	$4, $3, 2
-# was:	sll	_tmp_197_, _size_reg_194_, 2
-	addi	$4, $4, 4
-# was:	addi	_tmp_197_, _tmp_197_, 4
-	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_197_
-	sw	$3, 0($2)
-# was:	sw	_size_reg_194_, 0(_letBind_193_)
-	addi	$3, $2, 4
-# was:	addi	_addr_reg_195_, _letBind_193_, 4
-	ori	$4, $0, 0
-# was:	ori	_tmp_reg_196_, $0, 0
-	sw	$4, 0($3)
-# was:	sw	_tmp_reg_196_, 0(_addr_reg_195_)
-	addi	$3, $3, 4
-# was:	addi	_addr_reg_195_, _addr_reg_195_, 4
-	ori	$4, $0, 0
-# was:	ori	_tmp_reg_196_, $0, 0
-	sw	$4, 0($3)
-# was:	sw	_tmp_reg_196_, 0(_addr_reg_195_)
-	addi	$3, $3, 4
-# was:	addi	_addr_reg_195_, _addr_reg_195_, 4
-	ori	$4, $0, 0
-# was:	ori	_tmp_reg_196_, $0, 0
-	sw	$4, 0($3)
-# was:	sw	_tmp_reg_196_, 0(_addr_reg_195_)
-	addi	$3, $3, 4
-# was:	addi	_addr_reg_195_, _addr_reg_195_, 4
-	ori	$4, $0, 0
-# was:	ori	_tmp_reg_196_, $0, 0
-	sw	$4, 0($3)
-# was:	sw	_tmp_reg_196_, 0(_addr_reg_195_)
-	addi	$3, $3, 4
-# was:	addi	_addr_reg_195_, _addr_reg_195_, 4
-	ori	$17, $16, 0
-# was:	ori	_arr_reg_198_, _letBind_181_, 0
-	lw	$16, 0($17)
-# was:	lw	_size_reg_199_, 0(_arr_reg_198_)
-# 	ori	_msspres_178_,_letBind_193_,0
-	addi	$17, $17, 4
-# was:	addi	_arr_reg_198_, _arr_reg_198_, 4
-	ori	$18, $0, 0
-# was:	ori	_ind_var_200_, $0, 0
-_loop_beg_202_:
-	sub	$3, $18, $16
-# was:	sub	_tmp_reg_201_, _ind_var_200_, _size_reg_199_
-	bgez	$3, _loop_end_203_
-# was:	bgez	_tmp_reg_201_, _loop_end_203_
-	lw	$3, 0($17)
-# was:	lw	_tmp_reg_201_, 0(_arr_reg_198_)
-	addi	$17, $17, 4
-# was:	addi	_arr_reg_198_, _arr_reg_198_, 4
-# 	ori	$2,_msspres_178_,0
-# 	ori	$3,_tmp_reg_201_,0
-	jal	reducer
-# was:	jal	reducer, $2 $3
-# 	ori	_tmp_reg_204_,$2,0
-# 	ori	_msspres_178_,_tmp_reg_204_,0
-	addi	$18, $18, 1
-# was:	addi	_ind_var_200_, _ind_var_200_, 1
-	j	_loop_beg_202_
-_loop_end_203_:
-# 	ori	$2,_msspres_178_,0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function main
-main:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-	ori	$2, $0, 8
-# was:	ori	_arg_207_, $0, 8
-# 	ori	$2,_arg_207_,0
-	jal	mssp
-# was:	jal	mssp, $2
-	ori	$16, $2, 0
-# was:	ori	_letBind_206_, $2, 0
-	la	$2, _aaMSSPa_210_
-# was:	la	_tmp_209_, _aaMSSPa_210_
-# _aaMSSPa_210_: string "\n\nMSSP result is: "
-# 	ori	_letBind_208_,_tmp_209_,0
-# 	ori	$2,_tmp_209_,0
+# was:	ori	_fun_arg_res_71_, $28, 0
+	sll	$10, $5, 2
+# was:	sll	_tmp_191_, _size_reg_188_, 2
+	addi	$10, $10, 4
+# was:	addi	_tmp_191_, _tmp_191_, 4
+	add	$28, $28, $10
+# was:	add	$28, $28, _tmp_191_
+	sw	$5, 0($16)
+# was:	sw	_size_reg_188_, 0(_fun_arg_res_71_)
+	addi	$5, $16, 4
+# was:	addi	_addr_reg_189_, _fun_arg_res_71_, 4
+# 	ori	_tmp_reg_190_,_letBind_72_,0
+	sw	$6, 0($5)
+# was:	sw	_tmp_reg_190_, 0(_addr_reg_189_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_189_, _addr_reg_189_, 4
+	ori	$6, $7, 0
+# was:	ori	_tmp_reg_190_, _letBind_115_, 0
+	sw	$6, 0($5)
+# was:	sw	_tmp_reg_190_, 0(_addr_reg_189_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_189_, _addr_reg_189_, 4
+	ori	$6, $8, 0
+# was:	ori	_tmp_reg_190_, _letBind_144_, 0
+	sw	$6, 0($5)
+# was:	sw	_tmp_reg_190_, 0(_addr_reg_189_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_189_, _addr_reg_189_, 4
+	ori	$6, $9, 0
+# was:	ori	_tmp_reg_190_, _letBind_173_, 0
+	sw	$6, 0($5)
+# was:	sw	_tmp_reg_190_, 0(_addr_reg_189_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_189_, _addr_reg_189_, 4
+# 	ori	_letBind_2_,_fun_arg_res_71_,0
+	addi	$4, $4, 1
+# was:	addi	_ind_var_67_, _ind_var_67_, 1
+	j	_loop_beg_69_
+_loop_end_70_:
+	la	$2, _aaMSSPa_194_
+# was:	la	_tmp_193_, _aaMSSPa_194_
+# _aaMSSPa_194_: string "\n\nMSSP result is: "
+# 	ori	_letBind_192_,_tmp_193_,0
+# 	ori	$2,_tmp_193_,0
 	jal	putstring
 # was:	jal	putstring, $2
 	ori	$3, $0, 0
-# was:	ori	_arr_ind_212_, $0, 0
+# was:	ori	_arr_ind_196_, $0, 0
 	addi	$2, $16, 4
-# was:	addi	_arr_reg_213_, _letBind_206_, 4
+# was:	addi	_arr_reg_197_, _letBind_2_, 4
 	lw	$4, 0($16)
-# was:	lw	_size_reg_214_, 0(_letBind_206_)
-	bgez	$3, _safe_lab_217_
-# was:	bgez	_arr_ind_212_, _safe_lab_217_
-_error_lab_216_:
+# was:	lw	_size_reg_198_, 0(_letBind_2_)
+	bgez	$3, _safe_lab_201_
+# was:	bgez	_arr_ind_196_, _safe_lab_201_
+_error_lab_200_:
 	ori	$5, $0, 44
 # was:	ori	$5, $0, 44
 	la	$6, _Msg_IllegalIndex_
 # was:	la	$6, _Msg_IllegalIndex_
 	j	_RuntimeError_
-_safe_lab_217_:
+_safe_lab_201_:
 	sub	$4, $3, $4
-# was:	sub	_tmp_reg_215_, _arr_ind_212_, _size_reg_214_
-	bgez	$4, _error_lab_216_
-# was:	bgez	_tmp_reg_215_, _error_lab_216_
+# was:	sub	_tmp_reg_199_, _arr_ind_196_, _size_reg_198_
+	bgez	$4, _error_lab_200_
+# was:	bgez	_tmp_reg_199_, _error_lab_200_
 	sll	$3, $3, 2
-# was:	sll	_arr_ind_212_, _arr_ind_212_, 2
+# was:	sll	_arr_ind_196_, _arr_ind_196_, 2
 	add	$2, $2, $3
-# was:	add	_arr_reg_213_, _arr_reg_213_, _arr_ind_212_
+# was:	add	_arr_reg_197_, _arr_reg_197_, _arr_ind_196_
 	lw	$16, 0($2)
-# was:	lw	_tmp_211_, 0(_arr_reg_213_)
-# 	ori	_mainres_205_,_tmp_211_,0
+# was:	lw	_tmp_195_, 0(_arr_reg_197_)
+# 	ori	_mainres_1_,_tmp_195_,0
 	ori	$2, $16, 0
-# was:	ori	$2, _mainres_205_, 0
+# was:	ori	$2, _mainres_1_, 0
 	jal	putint
 # was:	jal	putint, $2
 	ori	$2, $16, 0
-# was:	ori	$2, _mainres_205_, 0
-	addi	$29, $29, 12
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 32
+	lw	$21, -28($29)
+	lw	$20, -24($29)
+	lw	$19, -20($29)
+	lw	$18, -16($29)
+	lw	$17, -12($29)
 	lw	$16, -8($29)
 	lw	$31, -4($29)
 	jr	$31
@@ -1069,27 +877,19 @@ _Msg_DivZero_:
 	.asciiz	"division by zero"
 # String Literals
 	.align	2
-_aaMSSPa_210_:
+_aaMSSPa_194_:
 	.space	4
 	.asciiz	"\n\nMSSP result is: "
 	.align	2
-_aaa__st_59_:
-	.space	4
-	.asciiz	" }\n"
-	.align	2
-_aaa__st_44_:
-	.space	4
-	.asciiz	" { "
-	.align	2
-_a__str__14_:
+_a__str__34_:
 	.space	4
 	.asciiz	"\n"
 	.align	2
-_aa__str_10_:
+_aa__str_30_:
 	.space	4
 	.asciiz	": "
 	.align	2
-_Introdu_5_:
+_Introdu_25_:
 	.space	4
 	.asciiz	"Introduce number "
 	.align	2
diff --git a/tests/lambda.asm b/tests/lambda.asm
index cb894b7..6afd51b 100644
--- a/tests/lambda.asm
+++ b/tests/lambda.asm
@@ -1,12 +1,12 @@
 	.text	0x00400000
 	.globl	main
 	la	$28, _heap_
-	la	$4, _a__str__45_
-# was:	la	_a__str__45__addr, _a__str__45_
+	la	$4, _a__str__41_
+# was:	la	_a__str__41__addr, _a__str__41_
 	ori	$3, $0, 1
-# was:	ori	_a__str__45__init, $0, 1
+# was:	ori	_a__str__41__init, $0, 1
 	sw	$3, 0($4)
-# was:	sw	_a__str__45__init, 0(_a__str__45__addr)
+# was:	sw	_a__str__41__init, 0(_a__str__41__addr)
 	la	$4, _true
 # was:	la	_true_addr, _true
 	ori	$3, $0, 4
@@ -23,225 +23,195 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function write_int
-write_int:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-# 	ori	_param_x_1_,$2,0
-	ori	$16, $2, 0
-# was:	ori	_tmp_3_, _param_x_1_, 0
-# 	ori	_write_intres_2_,_tmp_3_,0
-	ori	$2, $16, 0
-# was:	ori	$2, _write_intres_2_, 0
-	jal	putint
-# was:	jal	putint, $2
-	ori	$2, $16, 0
-# was:	ori	$2, _write_intres_2_, 0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function write_int_arr
-write_int_arr:
+# Function main
+main:
 	sw	$31, -4($29)
+	sw	$21, -28($29)
 	sw	$20, -24($29)
 	sw	$19, -20($29)
 	sw	$18, -16($29)
 	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -28
-# 	ori	_param_x_4_,$2,0
-# map
-# 	ori	_arr_reg_7_,_param_x_4_,0
-	lw	$16, 0($2)
-# was:	lw	_size_reg_6_, 0(_arr_reg_7_)
-# dynalloc
-	ori	$17, $28, 0
-# was:	ori	_write_int_arrres_5_, $28, 0
-	sll	$3, $16, 2
-# was:	sll	_tmp_16_, _size_reg_6_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_16_, _tmp_16_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_16_
-	sw	$16, 0($17)
-# was:	sw	_size_reg_6_, 0(_write_int_arrres_5_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_10_, _write_int_arrres_5_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_11_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_8_, _arr_reg_7_, 4
-_loop_beg_12_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_14_, _i_reg_11_, _size_reg_6_
-	bgez	$2, _loop_end_13_
-# was:	bgez	_tmp_reg_14_, _loop_end_13_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_9_, 0(_elem_reg_8_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_8_, _elem_reg_8_, 4
-# 	ori	$2,_res_reg_9_,0
-	jal	write_int
-# was:	jal	write_int, $2
-# 	ori	_tmp_reg_15_,$2,0
-# 	ori	_res_reg_9_,_tmp_reg_15_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_9_, 0(_addr_reg_10_)
-	addi	$18, $18, 4
-# was:	addi	_addr_reg_10_, _addr_reg_10_, 4
-	addi	$19, $19, 1
-# was:	addi	_i_reg_11_, _i_reg_11_, 1
-	j	_loop_beg_12_
-_loop_end_13_:
-	ori	$2, $17, 0
-# was:	ori	$2, _write_int_arrres_5_, 0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function main
-main:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
+	addi	$29, $29, -32
 	jal	getint
 # was:	jal	getint, $2
-# 	ori	_letBind_18_,$2,0
-	ori	$5, $2, 0
-# was:	ori	_size_reg_20_, _letBind_18_, 0
-	bgez	$5, _safe_lab_21_
-# was:	bgez	_size_reg_20_, _safe_lab_21_
+# 	ori	_letBind_2_,$2,0
+# 	ori	_size_reg_4_,_letBind_2_,0
+	bgez	$2, _safe_lab_5_
+# was:	bgez	_size_reg_4_, _safe_lab_5_
 	ori	$5, $0, 7
 # was:	ori	$5, $0, 7
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_21_:
+_safe_lab_5_:
 # dynalloc
 	ori	$6, $28, 0
-# was:	ori	_letBind_19_, $28, 0
-	sll	$2, $5, 2
-# was:	sll	_tmp_27_, _size_reg_20_, 2
-	addi	$2, $2, 4
-# was:	addi	_tmp_27_, _tmp_27_, 4
-	add	$28, $28, $2
-# was:	add	$28, $28, _tmp_27_
-	sw	$5, 0($6)
-# was:	sw	_size_reg_20_, 0(_letBind_19_)
-	addi	$2, $6, 4
-# was:	addi	_addr_reg_22_, _letBind_19_, 4
-	ori	$4, $0, 0
-# was:	ori	_i_reg_23_, $0, 0
-_loop_beg_24_:
-	sub	$3, $4, $5
-# was:	sub	_tmp_reg_26_, _i_reg_23_, _size_reg_20_
-	bgez	$3, _loop_end_25_
-# was:	bgez	_tmp_reg_26_, _loop_end_25_
-	sw	$4, 0($2)
-# was:	sw	_i_reg_23_, 0(_addr_reg_22_)
-	addi	$2, $2, 4
-# was:	addi	_addr_reg_22_, _addr_reg_22_, 4
-	addi	$4, $4, 1
-# was:	addi	_i_reg_23_, _i_reg_23_, 1
-	j	_loop_beg_24_
-_loop_end_25_:
+# was:	ori	_letBind_3_, $28, 0
+	sll	$3, $2, 2
+# was:	sll	_tmp_11_, _size_reg_4_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_11_, _tmp_11_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_11_
+	sw	$2, 0($6)
+# was:	sw	_size_reg_4_, 0(_letBind_3_)
+	addi	$5, $6, 4
+# was:	addi	_addr_reg_6_, _letBind_3_, 4
+	ori	$3, $0, 0
+# was:	ori	_i_reg_7_, $0, 0
+_loop_beg_8_:
+	sub	$4, $3, $2
+# was:	sub	_tmp_reg_10_, _i_reg_7_, _size_reg_4_
+	bgez	$4, _loop_end_9_
+# was:	bgez	_tmp_reg_10_, _loop_end_9_
+	sw	$3, 0($5)
+# was:	sw	_i_reg_7_, 0(_addr_reg_6_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_6_, _addr_reg_6_, 4
+	addi	$3, $3, 1
+# was:	addi	_i_reg_7_, _i_reg_7_, 1
+	j	_loop_beg_8_
+_loop_end_9_:
 # map
-# 	ori	_arr_reg_31_,_letBind_19_,0
-	lw	$2, 0($6)
-# was:	lw	_size_reg_30_, 0(_arr_reg_31_)
+# 	ori	_arr_reg_15_,_letBind_3_,0
+	lw	$3, 0($6)
+# was:	lw	_size_reg_14_, 0(_arr_reg_15_)
 # dynalloc
-	ori	$3, $28, 0
-# was:	ori	_arg_29_, $28, 0
-	sll	$4, $2, 2
-# was:	sll	_tmp_42_, _size_reg_30_, 2
+	ori	$2, $28, 0
+# was:	ori	_letBind_13_, $28, 0
+	sll	$4, $3, 2
+# was:	sll	_tmp_26_, _size_reg_14_, 2
 	addi	$4, $4, 4
-# was:	addi	_tmp_42_, _tmp_42_, 4
+# was:	addi	_tmp_26_, _tmp_26_, 4
 	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_42_
-	sw	$2, 0($3)
-# was:	sw	_size_reg_30_, 0(_arg_29_)
-	addi	$4, $3, 4
-# was:	addi	_addr_reg_34_, _arg_29_, 4
+# was:	add	$28, $28, _tmp_26_
+	sw	$3, 0($2)
+# was:	sw	_size_reg_14_, 0(_letBind_13_)
+	addi	$4, $2, 4
+# was:	addi	_addr_reg_18_, _letBind_13_, 4
 	ori	$5, $0, 0
-# was:	ori	_i_reg_35_, $0, 0
+# was:	ori	_i_reg_19_, $0, 0
 	addi	$6, $6, 4
-# was:	addi	_elem_reg_32_, _arr_reg_31_, 4
-_loop_beg_36_:
-	sub	$7, $5, $2
-# was:	sub	_tmp_reg_38_, _i_reg_35_, _size_reg_30_
-	bgez	$7, _loop_end_37_
-# was:	bgez	_tmp_reg_38_, _loop_end_37_
+# was:	addi	_elem_reg_16_, _arr_reg_15_, 4
+_loop_beg_20_:
+	sub	$7, $5, $3
+# was:	sub	_tmp_reg_22_, _i_reg_19_, _size_reg_14_
+	bgez	$7, _loop_end_21_
+# was:	bgez	_tmp_reg_22_, _loop_end_21_
 	lw	$7, 0($6)
-# was:	lw	_res_reg_33_, 0(_elem_reg_32_)
+# was:	lw	_res_reg_17_, 0(_elem_reg_16_)
 	addi	$6, $6, 4
-# was:	addi	_elem_reg_32_, _elem_reg_32_, 4
-# 	ori	_plus_L_40_,_res_reg_33_,0
-	ori	$8, $0, 2
-# was:	ori	_plus_R_41_, $0, 2
-	add	$7, $7, $8
-# was:	add	_fun_arg_res_39_, _plus_L_40_, _plus_R_41_
-# 	ori	_res_reg_33_,_fun_arg_res_39_,0
+# was:	addi	_elem_reg_16_, _elem_reg_16_, 4
+	ori	$8, $7, 0
+# was:	ori	_plus_L_24_, _res_reg_17_, 0
+	ori	$7, $0, 2
+# was:	ori	_plus_R_25_, $0, 2
+	add	$7, $8, $7
+# was:	add	_fun_arg_res_23_, _plus_L_24_, _plus_R_25_
+# 	ori	_res_reg_17_,_fun_arg_res_23_,0
 	sw	$7, 0($4)
-# was:	sw	_res_reg_33_, 0(_addr_reg_34_)
+# was:	sw	_res_reg_17_, 0(_addr_reg_18_)
 	addi	$4, $4, 4
-# was:	addi	_addr_reg_34_, _addr_reg_34_, 4
+# was:	addi	_addr_reg_18_, _addr_reg_18_, 4
 	addi	$5, $5, 1
-# was:	addi	_i_reg_35_, _i_reg_35_, 1
-	j	_loop_beg_36_
-_loop_end_37_:
-	ori	$2, $3, 0
-# was:	ori	$2, _arg_29_, 0
-	jal	write_int_arr
-# was:	jal	write_int_arr, $2
-	ori	$16, $2, 0
-# was:	ori	_letBind_28_, $2, 0
-	la	$2, _a__str__45_
-# was:	la	_tmp_44_, _a__str__45_
-# _a__str__45_: string "\n"
-# 	ori	_letBind_43_,_tmp_44_,0
-# 	ori	$2,_tmp_44_,0
+# was:	addi	_i_reg_19_, _i_reg_19_, 1
+	j	_loop_beg_20_
+_loop_end_21_:
+# map
+# 	ori	_arr_reg_28_,_letBind_13_,0
+	lw	$17, 0($2)
+# was:	lw	_size_reg_27_, 0(_arr_reg_28_)
+# dynalloc
+	ori	$16, $28, 0
+# was:	ori	_letBind_12_, $28, 0
+	sll	$3, $17, 2
+# was:	sll	_tmp_38_, _size_reg_27_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_38_, _tmp_38_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_38_
+	sw	$17, 0($16)
+# was:	sw	_size_reg_27_, 0(_letBind_12_)
+	addi	$18, $16, 4
+# was:	addi	_addr_reg_31_, _letBind_12_, 4
+	ori	$19, $0, 0
+# was:	ori	_i_reg_32_, $0, 0
+	addi	$20, $2, 4
+# was:	addi	_elem_reg_29_, _arr_reg_28_, 4
+_loop_beg_33_:
+	sub	$2, $19, $17
+# was:	sub	_tmp_reg_35_, _i_reg_32_, _size_reg_27_
+	bgez	$2, _loop_end_34_
+# was:	bgez	_tmp_reg_35_, _loop_end_34_
+	lw	$21, 0($20)
+# was:	lw	_res_reg_30_, 0(_elem_reg_29_)
+	addi	$20, $20, 4
+# was:	addi	_elem_reg_29_, _elem_reg_29_, 4
+# 	ori	_tmp_37_,_res_reg_30_,0
+# 	ori	_fun_arg_res_36_,_tmp_37_,0
+	ori	$2, $21, 0
+# was:	ori	$2, _fun_arg_res_36_, 0
+	jal	putint
+# was:	jal	putint, $2
+# 	ori	_res_reg_30_,_fun_arg_res_36_,0
+	sw	$21, 0($18)
+# was:	sw	_res_reg_30_, 0(_addr_reg_31_)
+	addi	$18, $18, 4
+# was:	addi	_addr_reg_31_, _addr_reg_31_, 4
+	addi	$19, $19, 1
+# was:	addi	_i_reg_32_, _i_reg_32_, 1
+	j	_loop_beg_33_
+_loop_end_34_:
+	la	$2, _a__str__41_
+# was:	la	_tmp_40_, _a__str__41_
+# _a__str__41_: string "\n"
+# 	ori	_letBind_39_,_tmp_40_,0
+# 	ori	$2,_tmp_40_,0
 	jal	putstring
 # was:	jal	putstring, $2
-# 	ori	_arr_reg_47_,_letBind_28_,0
+# 	ori	_arr_reg_43_,_letBind_12_,0
 	lw	$2, 0($16)
-# was:	lw	_size_reg_48_, 0(_arr_reg_47_)
-	ori	$4, $0, 0
-# was:	ori	_arg_46_, $0, 0
-	addi	$16, $16, 4
-# was:	addi	_arr_reg_47_, _arr_reg_47_, 4
+# was:	lw	_size_reg_44_, 0(_arr_reg_43_)
 	ori	$3, $0, 0
-# was:	ori	_ind_var_49_, $0, 0
-_loop_beg_51_:
-	sub	$5, $3, $2
-# was:	sub	_tmp_reg_50_, _ind_var_49_, _size_reg_48_
-	bgez	$5, _loop_end_52_
-# was:	bgez	_tmp_reg_50_, _loop_end_52_
-	lw	$5, 0($16)
-# was:	lw	_tmp_reg_50_, 0(_arr_reg_47_)
+# was:	ori	_letBind_42_, $0, 0
 	addi	$16, $16, 4
-# was:	addi	_arr_reg_47_, _arr_reg_47_, 4
-# 	ori	_plus_L_54_,_arg_46_,0
-# 	ori	_plus_R_55_,_tmp_reg_50_,0
-	add	$4, $4, $5
-# was:	add	_fun_arg_res_53_, _plus_L_54_, _plus_R_55_
-# 	ori	_arg_46_,_fun_arg_res_53_,0
-	addi	$3, $3, 1
-# was:	addi	_ind_var_49_, _ind_var_49_, 1
-	j	_loop_beg_51_
-_loop_end_52_:
-	ori	$2, $4, 0
-# was:	ori	$2, _arg_46_, 0
-	jal	write_int
-# was:	jal	write_int, $2
-# 	ori	_mainres_17_,$2,0
-# 	ori	$2,_mainres_17_,0
-	addi	$29, $29, 12
+# was:	addi	_arr_reg_43_, _arr_reg_43_, 4
+	ori	$4, $0, 0
+# was:	ori	_ind_var_45_, $0, 0
+_loop_beg_47_:
+	sub	$5, $4, $2
+# was:	sub	_tmp_reg_46_, _ind_var_45_, _size_reg_44_
+	bgez	$5, _loop_end_48_
+# was:	bgez	_tmp_reg_46_, _loop_end_48_
+	lw	$5, 0($16)
+# was:	lw	_tmp_reg_46_, 0(_arr_reg_43_)
+	addi	$16, $16, 4
+# was:	addi	_arr_reg_43_, _arr_reg_43_, 4
+# 	ori	_plus_L_50_,_letBind_42_,0
+# 	ori	_plus_R_51_,_tmp_reg_46_,0
+	add	$3, $3, $5
+# was:	add	_fun_arg_res_49_, _plus_L_50_, _plus_R_51_
+# 	ori	_letBind_42_,_fun_arg_res_49_,0
+	addi	$4, $4, 1
+# was:	addi	_ind_var_45_, _ind_var_45_, 1
+	j	_loop_beg_47_
+_loop_end_48_:
+# 	ori	_tmp_52_,_letBind_42_,0
+	ori	$16, $3, 0
+# was:	ori	_mainres_1_, _tmp_52_, 0
+	ori	$2, $16, 0
+# was:	ori	$2, _mainres_1_, 0
+	jal	putint
+# was:	jal	putint, $2
+	ori	$2, $16, 0
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 32
+	lw	$21, -28($29)
+	lw	$20, -24($29)
+	lw	$19, -20($29)
+	lw	$18, -16($29)
+	lw	$17, -12($29)
 	lw	$16, -8($29)
 	lw	$31, -4($29)
 	jr	$31
@@ -357,7 +327,7 @@ _Msg_DivZero_:
 	.asciiz	"division by zero"
 # String Literals
 	.align	2
-_a__str__45_:
+_a__str__41_:
 	.space	4
 	.asciiz	"\n"
 	.align	2
diff --git a/tests/map_red_io.asm b/tests/map_red_io.asm
index 8c3cc07..5fecd59 100644
--- a/tests/map_red_io.asm
+++ b/tests/map_red_io.asm
@@ -1,24 +1,24 @@
 	.text	0x00400000
 	.globl	main
 	la	$28, _heap_
-	la	$4, _Maxacha_82_
-# was:	la	_Maxacha_82__addr, _Maxacha_82_
+	la	$4, _Maxacha_72_
+# was:	la	_Maxacha_72__addr, _Maxacha_72_
 	ori	$3, $0, 10
-# was:	ori	_Maxacha_82__init, $0, 10
+# was:	ori	_Maxacha_72__init, $0, 10
 	sw	$3, 0($4)
-# was:	sw	_Maxacha_82__init, 0(_Maxacha_82__addr)
-	la	$4, _a__str__79_
-# was:	la	_a__str__79__addr, _a__str__79_
+# was:	sw	_Maxacha_72__init, 0(_Maxacha_72__addr)
+	la	$4, _a__str__69_
+# was:	la	_a__str__69__addr, _a__str__69_
 	ori	$3, $0, 1
-# was:	ori	_a__str__79__init, $0, 1
+# was:	ori	_a__str__69__init, $0, 1
 	sw	$3, 0($4)
-# was:	sw	_a__str__79__init, 0(_a__str__79__addr)
-	la	$4, _Sumaa___74_
-# was:	la	_Sumaa___74__addr, _Sumaa___74_
+# was:	sw	_a__str__69__init, 0(_a__str__69__addr)
+	la	$4, _Sumaa___64_
+# was:	la	_Sumaa___64__addr, _Sumaa___64_
 	ori	$3, $0, 5
-# was:	ori	_Sumaa___74__init, $0, 5
+# was:	ori	_Sumaa___64__init, $0, 5
 	sw	$3, 0($4)
-# was:	sw	_Sumaa___74__init, 0(_Sumaa___74__addr)
+# was:	sw	_Sumaa___64__init, 0(_Sumaa___64__addr)
 	la	$4, _true
 # was:	la	_true_addr, _true
 	ori	$3, $0, 4
@@ -35,70 +35,6 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function plus100
-plus100:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_1_,$2,0
-# 	ori	_plus_L_3_,_param_x_1_,0
-	ori	$3, $0, 100
-# was:	ori	_plus_R_4_, $0, 100
-	add	$2, $2, $3
-# was:	add	_plus100res_2_, _plus_L_3_, _plus_R_4_
-# 	ori	$2,_plus100res_2_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function read_chr
-read_chr:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_i_5_,$2,0
-	jal	getchar
-# was:	jal	getchar, $2
-# 	ori	_read_chrres_6_,$2,0
-# 	ori	$2,_read_chrres_6_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function plus
-plus:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_7_,$2,0
-# 	ori	_param_y_8_,$3,0
-# 	ori	_plus_L_10_,_param_x_7_,0
-# 	ori	_plus_R_11_,_param_y_8_,0
-	add	$2, $2, $3
-# was:	add	_plusres_9_, _plus_L_10_, _plus_R_11_
-# 	ori	$2,_plusres_9_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function max_chr
-max_chr:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_a_12_,$2,0
-# 	ori	_param_b_13_,$3,0
-# 	ori	_lt_L_19_,_param_a_12_,0
-# 	ori	_lt_R_20_,_param_b_13_,0
-	slt	$4, $2, $3
-# was:	slt	_cond_18_, _lt_L_19_, _lt_R_20_
-	bne	$4, $0, _then_15_
-# was:	bne	_cond_18_, $0, _then_15_
-	j	_else_16_
-_then_15_:
-	ori	$2, $3, 0
-# was:	ori	_max_chrres_14_, _param_b_13_, 0
-	j	_endif_17_
-_else_16_:
-# 	ori	_max_chrres_14_,_param_a_12_,0
-_endif_17_:
-# 	ori	$2,_max_chrres_14_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
@@ -111,232 +47,239 @@ main:
 	addi	$29, $29, -32
 	jal	getint
 # was:	jal	getint, $2
-# 	ori	_letBind_22_,$2,0
-# 	ori	_size_reg_24_,_letBind_22_,0
-	bgez	$2, _safe_lab_25_
-# was:	bgez	_size_reg_24_, _safe_lab_25_
+# 	ori	_letBind_2_,$2,0
+	ori	$5, $2, 0
+# was:	ori	_size_reg_4_, _letBind_2_, 0
+	bgez	$5, _safe_lab_5_
+# was:	bgez	_size_reg_4_, _safe_lab_5_
 	ori	$5, $0, 10
 # was:	ori	$5, $0, 10
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_25_:
+_safe_lab_5_:
 # dynalloc
-	ori	$16, $28, 0
-# was:	ori	_letBind_23_, $28, 0
-	sll	$3, $2, 2
-# was:	sll	_tmp_31_, _size_reg_24_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_31_, _tmp_31_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_31_
-	sw	$2, 0($16)
-# was:	sw	_size_reg_24_, 0(_letBind_23_)
-	addi	$3, $16, 4
-# was:	addi	_addr_reg_26_, _letBind_23_, 4
+	ori	$3, $28, 0
+# was:	ori	_letBind_3_, $28, 0
+	sll	$4, $5, 2
+# was:	sll	_tmp_11_, _size_reg_4_, 2
+	addi	$4, $4, 4
+# was:	addi	_tmp_11_, _tmp_11_, 4
+	add	$28, $28, $4
+# was:	add	$28, $28, _tmp_11_
+	sw	$5, 0($3)
+# was:	sw	_size_reg_4_, 0(_letBind_3_)
+	addi	$7, $3, 4
+# was:	addi	_addr_reg_6_, _letBind_3_, 4
 	ori	$4, $0, 0
-# was:	ori	_i_reg_27_, $0, 0
-_loop_beg_28_:
-	sub	$5, $4, $2
-# was:	sub	_tmp_reg_30_, _i_reg_27_, _size_reg_24_
-	bgez	$5, _loop_end_29_
-# was:	bgez	_tmp_reg_30_, _loop_end_29_
-	sw	$4, 0($3)
-# was:	sw	_i_reg_27_, 0(_addr_reg_26_)
-	addi	$3, $3, 4
-# was:	addi	_addr_reg_26_, _addr_reg_26_, 4
+# was:	ori	_i_reg_7_, $0, 0
+_loop_beg_8_:
+	sub	$6, $4, $5
+# was:	sub	_tmp_reg_10_, _i_reg_7_, _size_reg_4_
+	bgez	$6, _loop_end_9_
+# was:	bgez	_tmp_reg_10_, _loop_end_9_
+	sw	$4, 0($7)
+# was:	sw	_i_reg_7_, 0(_addr_reg_6_)
+	addi	$7, $7, 4
+# was:	addi	_addr_reg_6_, _addr_reg_6_, 4
 	addi	$4, $4, 1
-# was:	addi	_i_reg_27_, _i_reg_27_, 1
-	j	_loop_beg_28_
-_loop_end_29_:
+# was:	addi	_i_reg_7_, _i_reg_7_, 1
+	j	_loop_beg_8_
+_loop_end_9_:
 # map
-# 	ori	_arr_reg_34_,_letBind_23_,0
-	lw	$17, 0($16)
-# was:	lw	_size_reg_33_, 0(_arr_reg_34_)
+# 	ori	_arr_reg_14_,_letBind_3_,0
+	lw	$5, 0($3)
+# was:	lw	_size_reg_13_, 0(_arr_reg_14_)
 # dynalloc
-	ori	$20, $28, 0
-# was:	ori	_letBind_32_, $28, 0
-	sll	$2, $17, 2
-# was:	sll	_tmp_43_, _size_reg_33_, 2
-	addi	$2, $2, 4
-# was:	addi	_tmp_43_, _tmp_43_, 4
-	add	$28, $28, $2
-# was:	add	$28, $28, _tmp_43_
-	sw	$17, 0($20)
-# was:	sw	_size_reg_33_, 0(_letBind_32_)
-	addi	$18, $20, 4
-# was:	addi	_addr_reg_37_, _letBind_32_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_38_, $0, 0
-	addi	$21, $16, 4
-# was:	addi	_elem_reg_35_, _arr_reg_34_, 4
-_loop_beg_39_:
-	sub	$2, $19, $17
-# was:	sub	_tmp_reg_41_, _i_reg_38_, _size_reg_33_
-	bgez	$2, _loop_end_40_
-# was:	bgez	_tmp_reg_41_, _loop_end_40_
-	lw	$2, 0($21)
-# was:	lw	_res_reg_36_, 0(_elem_reg_35_)
-	addi	$21, $21, 4
-# was:	addi	_elem_reg_35_, _elem_reg_35_, 4
-# 	ori	$2,_res_reg_36_,0
-	jal	plus100
-# was:	jal	plus100, $2
-# 	ori	_tmp_reg_42_,$2,0
-# 	ori	_res_reg_36_,_tmp_reg_42_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_36_, 0(_addr_reg_37_)
-	addi	$18, $18, 4
-# was:	addi	_addr_reg_37_, _addr_reg_37_, 4
-	addi	$19, $19, 1
-# was:	addi	_i_reg_38_, _i_reg_38_, 1
-	j	_loop_beg_39_
-_loop_end_40_:
-# 	ori	_arr_reg_45_,_letBind_32_,0
-	lw	$18, 0($20)
-# was:	lw	_size_reg_46_, 0(_arr_reg_45_)
+	ori	$4, $28, 0
+# was:	ori	_letBind_12_, $28, 0
+	sll	$6, $5, 2
+# was:	sll	_tmp_25_, _size_reg_13_, 2
+	addi	$6, $6, 4
+# was:	addi	_tmp_25_, _tmp_25_, 4
+	add	$28, $28, $6
+# was:	add	$28, $28, _tmp_25_
+	sw	$5, 0($4)
+# was:	sw	_size_reg_13_, 0(_letBind_12_)
+	addi	$7, $4, 4
+# was:	addi	_addr_reg_17_, _letBind_12_, 4
+	ori	$6, $0, 0
+# was:	ori	_i_reg_18_, $0, 0
+	addi	$8, $3, 4
+# was:	addi	_elem_reg_15_, _arr_reg_14_, 4
+_loop_beg_19_:
+	sub	$9, $6, $5
+# was:	sub	_tmp_reg_21_, _i_reg_18_, _size_reg_13_
+	bgez	$9, _loop_end_20_
+# was:	bgez	_tmp_reg_21_, _loop_end_20_
+	lw	$9, 0($8)
+# was:	lw	_res_reg_16_, 0(_elem_reg_15_)
+	addi	$8, $8, 4
+# was:	addi	_elem_reg_15_, _elem_reg_15_, 4
+# 	ori	_plus_L_23_,_res_reg_16_,0
+	ori	$10, $0, 100
+# was:	ori	_plus_R_24_, $0, 100
+	add	$9, $9, $10
+# was:	add	_fun_arg_res_22_, _plus_L_23_, _plus_R_24_
+# 	ori	_res_reg_16_,_fun_arg_res_22_,0
+	sw	$9, 0($7)
+# was:	sw	_res_reg_16_, 0(_addr_reg_17_)
+	addi	$7, $7, 4
+# was:	addi	_addr_reg_17_, _addr_reg_17_, 4
+	addi	$6, $6, 1
+# was:	addi	_i_reg_18_, _i_reg_18_, 1
+	j	_loop_beg_19_
+_loop_end_20_:
+	ori	$7, $4, 0
+# was:	ori	_arr_reg_27_, _letBind_12_, 0
+	lw	$5, 0($7)
+# was:	lw	_size_reg_28_, 0(_arr_reg_27_)
 	ori	$17, $0, 0
-# was:	ori	_letBind_44_, $0, 0
-	addi	$20, $20, 4
-# was:	addi	_arr_reg_45_, _arr_reg_45_, 4
-	ori	$19, $0, 0
-# was:	ori	_ind_var_47_, $0, 0
-_loop_beg_49_:
-	sub	$3, $19, $18
-# was:	sub	_tmp_reg_48_, _ind_var_47_, _size_reg_46_
-	bgez	$3, _loop_end_50_
-# was:	bgez	_tmp_reg_48_, _loop_end_50_
-	lw	$3, 0($20)
-# was:	lw	_tmp_reg_48_, 0(_arr_reg_45_)
-	addi	$20, $20, 4
-# was:	addi	_arr_reg_45_, _arr_reg_45_, 4
-	ori	$2, $17, 0
-# was:	ori	$2, _letBind_44_, 0
-# 	ori	$3,_tmp_reg_48_,0
-	jal	plus
-# was:	jal	plus, $2 $3
-# 	ori	_tmp_reg_51_,$2,0
-	ori	$17, $2, 0
-# was:	ori	_letBind_44_, _tmp_reg_51_, 0
-	addi	$19, $19, 1
-# was:	addi	_ind_var_47_, _ind_var_47_, 1
-	j	_loop_beg_49_
-_loop_end_50_:
+# was:	ori	_letBind_26_, $0, 0
+	addi	$7, $7, 4
+# was:	addi	_arr_reg_27_, _arr_reg_27_, 4
+	ori	$6, $0, 0
+# was:	ori	_ind_var_29_, $0, 0
+_loop_beg_31_:
+	sub	$4, $6, $5
+# was:	sub	_tmp_reg_30_, _ind_var_29_, _size_reg_28_
+	bgez	$4, _loop_end_32_
+# was:	bgez	_tmp_reg_30_, _loop_end_32_
+	lw	$4, 0($7)
+# was:	lw	_tmp_reg_30_, 0(_arr_reg_27_)
+	addi	$7, $7, 4
+# was:	addi	_arr_reg_27_, _arr_reg_27_, 4
+# 	ori	_plus_L_34_,_letBind_26_,0
+# 	ori	_plus_R_35_,_tmp_reg_30_,0
+	add	$17, $17, $4
+# was:	add	_fun_arg_res_33_, _plus_L_34_, _plus_R_35_
+# 	ori	_letBind_26_,_fun_arg_res_33_,0
+	addi	$6, $6, 1
+# was:	addi	_ind_var_29_, _ind_var_29_, 1
+	j	_loop_beg_31_
+_loop_end_32_:
 # map
-	ori	$2, $16, 0
-# was:	ori	_arr_reg_54_, _letBind_23_, 0
-	lw	$18, 0($2)
-# was:	lw	_size_reg_53_, 0(_arr_reg_54_)
+# 	ori	_arr_reg_38_,_letBind_3_,0
+	lw	$18, 0($3)
+# was:	lw	_size_reg_37_, 0(_arr_reg_38_)
 # dynalloc
 	ori	$16, $28, 0
-# was:	ori	_letBind_52_, $28, 0
-	addi	$3, $18, 3
-# was:	addi	_tmp_63_, _size_reg_53_, 3
-	sra	$3, $3, 2
-# was:	sra	_tmp_63_, _tmp_63_, 2
-	sll	$3, $3, 2
-# was:	sll	_tmp_63_, _tmp_63_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_63_, _tmp_63_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_63_
+# was:	ori	_letBind_36_, $28, 0
+	addi	$4, $18, 3
+# was:	addi	_tmp_47_, _size_reg_37_, 3
+	sra	$4, $4, 2
+# was:	sra	_tmp_47_, _tmp_47_, 2
+	sll	$4, $4, 2
+# was:	sll	_tmp_47_, _tmp_47_, 2
+	addi	$4, $4, 4
+# was:	addi	_tmp_47_, _tmp_47_, 4
+	add	$28, $28, $4
+# was:	add	$28, $28, _tmp_47_
 	sw	$18, 0($16)
-# was:	sw	_size_reg_53_, 0(_letBind_52_)
+# was:	sw	_size_reg_37_, 0(_letBind_36_)
 	addi	$20, $16, 4
-# was:	addi	_addr_reg_57_, _letBind_52_, 4
+# was:	addi	_addr_reg_41_, _letBind_36_, 4
 	ori	$19, $0, 0
-# was:	ori	_i_reg_58_, $0, 0
-	addi	$21, $2, 4
-# was:	addi	_elem_reg_55_, _arr_reg_54_, 4
-_loop_beg_59_:
-	sub	$2, $19, $18
-# was:	sub	_tmp_reg_61_, _i_reg_58_, _size_reg_53_
-	bgez	$2, _loop_end_60_
-# was:	bgez	_tmp_reg_61_, _loop_end_60_
-	lw	$2, 0($21)
-# was:	lw	_res_reg_56_, 0(_elem_reg_55_)
+# was:	ori	_i_reg_42_, $0, 0
+	addi	$21, $3, 4
+# was:	addi	_elem_reg_39_, _arr_reg_38_, 4
+_loop_beg_43_:
+	sub	$3, $19, $18
+# was:	sub	_tmp_reg_45_, _i_reg_42_, _size_reg_37_
+	bgez	$3, _loop_end_44_
+# was:	bgez	_tmp_reg_45_, _loop_end_44_
+	lw	$3, 0($21)
+# was:	lw	_res_reg_40_, 0(_elem_reg_39_)
 	addi	$21, $21, 4
-# was:	addi	_elem_reg_55_, _elem_reg_55_, 4
-# 	ori	$2,_res_reg_56_,0
-	jal	read_chr
-# was:	jal	read_chr, $2
-# 	ori	_tmp_reg_62_,$2,0
-# 	ori	_res_reg_56_,_tmp_reg_62_,0
-	sb	$2, 0($20)
-# was:	sb	_res_reg_56_, 0(_addr_reg_57_)
+# was:	addi	_elem_reg_39_, _elem_reg_39_, 4
+	jal	getchar
+# was:	jal	getchar, $2
+# 	ori	_fun_arg_res_46_,$2,0
+	ori	$3, $2, 0
+# was:	ori	_res_reg_40_, _fun_arg_res_46_, 0
+	sb	$3, 0($20)
+# was:	sb	_res_reg_40_, 0(_addr_reg_41_)
 	addi	$20, $20, 1
-# was:	addi	_addr_reg_57_, _addr_reg_57_, 1
+# was:	addi	_addr_reg_41_, _addr_reg_41_, 1
 	addi	$19, $19, 1
-# was:	addi	_i_reg_58_, _i_reg_58_, 1
-	j	_loop_beg_59_
-_loop_end_60_:
-	ori	$20, $16, 0
-# was:	ori	_arr_reg_65_, _letBind_52_, 0
-	lw	$19, 0($20)
-# was:	lw	_size_reg_66_, 0(_arr_reg_65_)
+# was:	addi	_i_reg_42_, _i_reg_42_, 1
+	j	_loop_beg_43_
+_loop_end_44_:
+	ori	$2, $16, 0
+# was:	ori	_arr_reg_49_, _letBind_36_, 0
+	lw	$3, 0($2)
+# was:	lw	_size_reg_50_, 0(_arr_reg_49_)
 	ori	$18, $0, 97
-# was:	ori	_letBind_64_, $0, 97
-	addi	$20, $20, 4
-# was:	addi	_arr_reg_65_, _arr_reg_65_, 4
-	ori	$21, $0, 0
-# was:	ori	_ind_var_67_, $0, 0
-_loop_beg_69_:
-	sub	$3, $21, $19
-# was:	sub	_tmp_reg_68_, _ind_var_67_, _size_reg_66_
-	bgez	$3, _loop_end_70_
-# was:	bgez	_tmp_reg_68_, _loop_end_70_
-	lb	$3, 0($20)
-# was:	lb	_tmp_reg_68_, 0(_arr_reg_65_)
-	addi	$20, $20, 1
-# was:	addi	_arr_reg_65_, _arr_reg_65_, 1
-	ori	$2, $18, 0
-# was:	ori	$2, _letBind_64_, 0
-# 	ori	$3,_tmp_reg_68_,0
-	jal	max_chr
-# was:	jal	max_chr, $2 $3
-# 	ori	_tmp_reg_71_,$2,0
-	ori	$18, $2, 0
-# was:	ori	_letBind_64_, _tmp_reg_71_, 0
-	addi	$21, $21, 1
-# was:	addi	_ind_var_67_, _ind_var_67_, 1
-	j	_loop_beg_69_
-_loop_end_70_:
-	la	$2, _Sumaa___74_
-# was:	la	_tmp_73_, _Sumaa___74_
-# _Sumaa___74_: string "Sum: "
-# 	ori	_letBind_72_,_tmp_73_,0
-# 	ori	$2,_tmp_73_,0
+# was:	ori	_letBind_48_, $0, 97
+	addi	$2, $2, 4
+# was:	addi	_arr_reg_49_, _arr_reg_49_, 4
+	ori	$4, $0, 0
+# was:	ori	_ind_var_51_, $0, 0
+_loop_beg_53_:
+	sub	$5, $4, $3
+# was:	sub	_tmp_reg_52_, _ind_var_51_, _size_reg_50_
+	bgez	$5, _loop_end_54_
+# was:	bgez	_tmp_reg_52_, _loop_end_54_
+	lb	$5, 0($2)
+# was:	lb	_tmp_reg_52_, 0(_arr_reg_49_)
+	addi	$2, $2, 1
+# was:	addi	_arr_reg_49_, _arr_reg_49_, 1
+# 	ori	_lt_L_60_,_letBind_48_,0
+# 	ori	_lt_R_61_,_tmp_reg_52_,0
+	slt	$6, $18, $5
+# was:	slt	_cond_59_, _lt_L_60_, _lt_R_61_
+	bne	$6, $0, _then_56_
+# was:	bne	_cond_59_, $0, _then_56_
+	j	_else_57_
+_then_56_:
+# 	ori	_fun_arg_res_55_,_tmp_reg_52_,0
+	j	_endif_58_
+_else_57_:
+	ori	$5, $18, 0
+# was:	ori	_fun_arg_res_55_, _letBind_48_, 0
+_endif_58_:
+	ori	$18, $5, 0
+# was:	ori	_letBind_48_, _fun_arg_res_55_, 0
+	addi	$4, $4, 1
+# was:	addi	_ind_var_51_, _ind_var_51_, 1
+	j	_loop_beg_53_
+_loop_end_54_:
+	la	$2, _Sumaa___64_
+# was:	la	_tmp_63_, _Sumaa___64_
+# _Sumaa___64_: string "Sum: "
+# 	ori	_letBind_62_,_tmp_63_,0
+# 	ori	$2,_tmp_63_,0
 	jal	putstring
 # was:	jal	putstring, $2
+# 	ori	_tmp_66_,_letBind_26_,0
 	ori	$2, $17, 0
-# was:	ori	_tmp_76_, _letBind_44_, 0
-# 	ori	_letBind_75_,_tmp_76_,0
-# 	ori	$2,_letBind_75_,0
+# was:	ori	_letBind_65_, _tmp_66_, 0
+# 	ori	$2,_letBind_65_,0
 	jal	putint
 # was:	jal	putint, $2
-	la	$2, _a__str__79_
-# was:	la	_tmp_78_, _a__str__79_
-# _a__str__79_: string "\n"
-# 	ori	_letBind_77_,_tmp_78_,0
-# 	ori	$2,_tmp_78_,0
+	la	$2, _a__str__69_
+# was:	la	_tmp_68_, _a__str__69_
+# _a__str__69_: string "\n"
+# 	ori	_letBind_67_,_tmp_68_,0
+# 	ori	$2,_tmp_68_,0
 	jal	putstring
 # was:	jal	putstring, $2
-	la	$2, _Maxacha_82_
-# was:	la	_tmp_81_, _Maxacha_82_
-# _Maxacha_82_: string "Max char: "
-# 	ori	_letBind_80_,_tmp_81_,0
-# 	ori	$2,_tmp_81_,0
+	la	$2, _Maxacha_72_
+# was:	la	_tmp_71_, _Maxacha_72_
+# _Maxacha_72_: string "Max char: "
+# 	ori	_letBind_70_,_tmp_71_,0
+# 	ori	$2,_tmp_71_,0
 	jal	putstring
 # was:	jal	putstring, $2
 	ori	$2, $18, 0
-# was:	ori	_tmp_84_, _letBind_64_, 0
-# 	ori	_letBind_83_,_tmp_84_,0
-# 	ori	$2,_letBind_83_,0
+# was:	ori	_tmp_74_, _letBind_48_, 0
+# 	ori	_letBind_73_,_tmp_74_,0
+# 	ori	$2,_letBind_73_,0
 	jal	putchar
 # was:	jal	putchar, $2
 	ori	$2, $16, 0
-# was:	ori	_mainres_21_, _letBind_52_, 0
-# 	ori	$2,_mainres_21_,0
+# was:	ori	_mainres_1_, _letBind_36_, 0
+# 	ori	$2,_mainres_1_,0
 	addi	$29, $29, 32
 	lw	$21, -28($29)
 	lw	$20, -24($29)
@@ -458,15 +401,15 @@ _Msg_DivZero_:
 	.asciiz	"division by zero"
 # String Literals
 	.align	2
-_Maxacha_82_:
+_Maxacha_72_:
 	.space	4
 	.asciiz	"Max char: "
 	.align	2
-_a__str__79_:
+_a__str__69_:
 	.space	4
 	.asciiz	"\n"
 	.align	2
-_Sumaa___74_:
+_Sumaa___64_:
 	.space	4
 	.asciiz	"Sum: "
 	.align	2
diff --git a/tests/negate.asm b/tests/negate.asm
index 00a4b35..1cc68f9 100644
--- a/tests/negate.asm
+++ b/tests/negate.asm
@@ -1,6 +1,30 @@
 	.text	0x00400000
 	.globl	main
 	la	$28, _heap_
+	la	$4, _a__str__39_
+# was:	la	_a__str__39__addr, _a__str__39_
+	ori	$3, $0, 1
+# was:	ori	_a__str__39__init, $0, 1
+	sw	$3, 0($4)
+# was:	sw	_a__str__39__init, 0(_a__str__39__addr)
+	la	$4, _a__str__29_
+# was:	la	_a__str__29__addr, _a__str__29_
+	ori	$3, $0, 1
+# was:	ori	_a__str__29__init, $0, 1
+	sw	$3, 0($4)
+# was:	sw	_a__str__29__init, 0(_a__str__29__addr)
+	la	$4, _a__str__22_
+# was:	la	_a__str__22__addr, _a__str__22_
+	ori	$3, $0, 1
+# was:	ori	_a__str__22__init, $0, 1
+	sw	$3, 0($4)
+# was:	sw	_a__str__22__init, 0(_a__str__22__addr)
+	la	$4, _a__str__15_
+# was:	la	_a__str__15__addr, _a__str__15_
+	ori	$3, $0, 1
+# was:	ori	_a__str__15__init, $0, 1
+	sw	$3, 0($4)
+# was:	sw	_a__str__15__init, 0(_a__str__15__addr)
 	la	$4, _a__str__8_
 # was:	la	_a__str__8__addr, _a__str__8_
 	ori	$3, $0, 1
@@ -23,18 +47,21 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function write_nl
-write_nl:
+# Function main
+main:
 	sw	$31, -4($29)
+	sw	$20, -24($29)
+	sw	$19, -20($29)
+	sw	$18, -16($29)
+	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -12
-# 	ori	_param_b_1_,$2,0
-	ori	$16, $2, 0
-# was:	ori	_tmp_4_, _param_b_1_, 0
+	addi	$29, $29, -28
+	ori	$17, $0, 1
+# was:	ori	_tmp_4_, $0, 1
 # 	ori	_letBind_3_,_tmp_4_,0
 	la	$2, _true
 # was:	la	$2, _true
-	bne	$16, $0, _wBoolF_5_
+	bne	$17, $0, _wBoolF_5_
 # was:	bne	_letBind_3_, $0, _wBoolF_5_
 	la	$2, _false
 # was:	la	$2, _false
@@ -47,72 +74,108 @@ _wBoolF_5_:
 # 	ori	_letBind_6_,_tmp_7_,0
 # 	ori	$2,_tmp_7_,0
 	jal	putstring
+# was:	jal	putstring, $2
+# 	ori	_letBind_2_,_letBind_3_,0
+	ori	$18, $0, 0
+# was:	ori	_tmp_11_, $0, 0
+# 	ori	_letBind_10_,_tmp_11_,0
+	la	$2, _true
+# was:	la	$2, _true
+	bne	$18, $0, _wBoolF_12_
+# was:	bne	_letBind_10_, $0, _wBoolF_12_
+	la	$2, _false
+# was:	la	$2, _false
+_wBoolF_12_:
+	jal	putstring
+# was:	jal	putstring, $2
+	la	$2, _a__str__15_
+# was:	la	_tmp_14_, _a__str__15_
+# _a__str__15_: string "\n"
+# 	ori	_letBind_13_,_tmp_14_,0
+# 	ori	$2,_tmp_14_,0
+	jal	putstring
+# was:	jal	putstring, $2
+# 	ori	_letBind_9_,_letBind_10_,0
+	ori	$19, $0, 0
+# was:	ori	_tmp_18_, $0, 0
+# 	ori	_letBind_17_,_tmp_18_,0
+	la	$2, _true
+# was:	la	$2, _true
+	bne	$19, $0, _wBoolF_19_
+# was:	bne	_letBind_17_, $0, _wBoolF_19_
+	la	$2, _false
+# was:	la	$2, _false
+_wBoolF_19_:
+	jal	putstring
+# was:	jal	putstring, $2
+	la	$2, _a__str__22_
+# was:	la	_tmp_21_, _a__str__22_
+# _a__str__22_: string "\n"
+# 	ori	_letBind_20_,_tmp_21_,0
+# 	ori	$2,_tmp_21_,0
+	jal	putstring
+# was:	jal	putstring, $2
+# 	ori	_letBind_16_,_letBind_17_,0
+	ori	$20, $0, 1
+# was:	ori	_tmp_25_, $0, 1
+# 	ori	_letBind_24_,_tmp_25_,0
+	la	$2, _true
+# was:	la	$2, _true
+	bne	$20, $0, _wBoolF_26_
+# was:	bne	_letBind_24_, $0, _wBoolF_26_
+	la	$2, _false
+# was:	la	$2, _false
+_wBoolF_26_:
+	jal	putstring
+# was:	jal	putstring, $2
+	la	$2, _a__str__29_
+# was:	la	_tmp_28_, _a__str__29_
+# _a__str__29_: string "\n"
+# 	ori	_letBind_27_,_tmp_28_,0
+# 	ori	$2,_tmp_28_,0
+	jal	putstring
+# was:	jal	putstring, $2
+# 	ori	_letBind_23_,_letBind_24_,0
+# 	ori	_letBind_30_,_letBind_2_,0
+	beq	$17, $16, _false_33_
+# was:	beq	_letBind_30_, 0, _false_33_
+	ori	$17, $18, 0
+# was:	ori	_letBind_30_, _letBind_9_, 0
+_false_33_:
+	beq	$17, $16, _false_32_
+# was:	beq	_letBind_30_, 0, _false_32_
+	ori	$17, $19, 0
+# was:	ori	_letBind_30_, _letBind_16_, 0
+_false_32_:
+	beq	$17, $16, _false_31_
+# was:	beq	_letBind_30_, 0, _false_31_
+	ori	$17, $20, 0
+# was:	ori	_letBind_30_, _letBind_23_, 0
+_false_31_:
+	ori	$16, $17, 0
+# was:	ori	_tmp_35_, _letBind_30_, 0
+# 	ori	_letBind_34_,_tmp_35_,0
+	la	$2, _true
+# was:	la	$2, _true
+	bne	$16, $0, _wBoolF_36_
+# was:	bne	_letBind_34_, $0, _wBoolF_36_
+	la	$2, _false
+# was:	la	$2, _false
+_wBoolF_36_:
+	jal	putstring
+# was:	jal	putstring, $2
+	la	$2, _a__str__39_
+# was:	la	_tmp_38_, _a__str__39_
+# _a__str__39_: string "\n"
+# 	ori	_letBind_37_,_tmp_38_,0
+# 	ori	$2,_tmp_38_,0
+	jal	putstring
 # was:	jal	putstring, $2
 	ori	$2, $16, 0
-# was:	ori	_write_nlres_2_, _letBind_3_, 0
-# 	ori	$2,_write_nlres_2_,0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function main
-main:
-	sw	$31, -4($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -24
-	ori	$2, $0, 1
-# was:	ori	_arg_11_, $0, 1
-# 	ori	$2,_arg_11_,0
-	jal	write_nl
-# was:	jal	write_nl, $2
-	ori	$18, $2, 0
-# was:	ori	_letBind_10_, $2, 0
-	ori	$2, $0, 0
-# was:	ori	_arg_13_, $0, 0
-# 	ori	$2,_arg_13_,0
-	jal	write_nl
-# was:	jal	write_nl, $2
-	ori	$16, $2, 0
-# was:	ori	_letBind_12_, $2, 0
-	ori	$2, $0, 0
-# was:	ori	_arg_15_, $0, 0
-# 	ori	$2,_arg_15_,0
-	jal	write_nl
-# was:	jal	write_nl, $2
-	ori	$17, $2, 0
-# was:	ori	_letBind_14_, $2, 0
-	ori	$2, $0, 1
-# was:	ori	_arg_17_, $0, 1
-# 	ori	$2,_arg_17_,0
-	jal	write_nl
-# was:	jal	write_nl, $2
-# 	ori	_letBind_16_,$2,0
-# 	ori	_arg_18_,_letBind_10_,0
-	beq	$18, $19, _false_21_
-# was:	beq	_arg_18_, 0, _false_21_
-	ori	$18, $16, 0
-# was:	ori	_arg_18_, _letBind_12_, 0
-_false_21_:
-	beq	$18, $19, _false_20_
-# was:	beq	_arg_18_, 0, _false_20_
-	ori	$18, $17, 0
-# was:	ori	_arg_18_, _letBind_14_, 0
-_false_20_:
-	beq	$18, $19, _false_19_
-# was:	beq	_arg_18_, 0, _false_19_
-	ori	$18, $2, 0
-# was:	ori	_arg_18_, _letBind_16_, 0
-_false_19_:
-	ori	$2, $18, 0
-# was:	ori	$2, _arg_18_, 0
-	jal	write_nl
-# was:	jal	write_nl, $2
-# 	ori	_mainres_9_,$2,0
-# 	ori	$2,_mainres_9_,0
-	addi	$29, $29, 24
+# was:	ori	_mainres_1_, _letBind_34_, 0
+# 	ori	$2,_mainres_1_,0
+	addi	$29, $29, 28
+	lw	$20, -24($29)
 	lw	$19, -20($29)
 	lw	$18, -16($29)
 	lw	$17, -12($29)
@@ -231,6 +294,22 @@ _Msg_DivZero_:
 	.asciiz	"division by zero"
 # String Literals
 	.align	2
+_a__str__39_:
+	.space	4
+	.asciiz	"\n"
+	.align	2
+_a__str__29_:
+	.space	4
+	.asciiz	"\n"
+	.align	2
+_a__str__22_:
+	.space	4
+	.asciiz	"\n"
+	.align	2
+_a__str__15_:
+	.space	4
+	.asciiz	"\n"
+	.align	2
 _a__str__8_:
 	.space	4
 	.asciiz	"\n"
diff --git a/tests/ordchr.asm b/tests/ordchr.asm
index dba29e0..63446f1 100644
--- a/tests/ordchr.asm
+++ b/tests/ordchr.asm
@@ -17,136 +17,6 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function read_char
-read_char:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_i_1_,$2,0
-	jal	getchar
-# was:	jal	getchar, $2
-# 	ori	_read_charres_2_,$2,0
-# 	ori	$2,_read_charres_2_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function read_string
-read_string:
-	sw	$31, -4($29)
-	sw	$20, -24($29)
-	sw	$19, -20($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -28
-# 	ori	_param_n_3_,$2,0
-# map
-	ori	$3, $2, 0
-# was:	ori	_size_reg_9_, _param_n_3_, 0
-	bgez	$3, _safe_lab_10_
-# was:	bgez	_size_reg_9_, _safe_lab_10_
-	ori	$5, $0, 3
-# was:	ori	$5, $0, 3
-	la	$6, _Msg_IllegalArraySize_
-# was:	la	$6, _Msg_IllegalArraySize_
-	j	_RuntimeError_
-_safe_lab_10_:
-# dynalloc
-	ori	$2, $28, 0
-# was:	ori	_arr_reg_6_, $28, 0
-	sll	$4, $3, 2
-# was:	sll	_tmp_16_, _size_reg_9_, 2
-	addi	$4, $4, 4
-# was:	addi	_tmp_16_, _tmp_16_, 4
-	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_16_
-	sw	$3, 0($2)
-# was:	sw	_size_reg_9_, 0(_arr_reg_6_)
-	addi	$6, $2, 4
-# was:	addi	_addr_reg_11_, _arr_reg_6_, 4
-	ori	$5, $0, 0
-# was:	ori	_i_reg_12_, $0, 0
-_loop_beg_13_:
-	sub	$4, $5, $3
-# was:	sub	_tmp_reg_15_, _i_reg_12_, _size_reg_9_
-	bgez	$4, _loop_end_14_
-# was:	bgez	_tmp_reg_15_, _loop_end_14_
-	sw	$5, 0($6)
-# was:	sw	_i_reg_12_, 0(_addr_reg_11_)
-	addi	$6, $6, 4
-# was:	addi	_addr_reg_11_, _addr_reg_11_, 4
-	addi	$5, $5, 1
-# was:	addi	_i_reg_12_, _i_reg_12_, 1
-	j	_loop_beg_13_
-_loop_end_14_:
-	lw	$16, 0($2)
-# was:	lw	_size_reg_5_, 0(_arr_reg_6_)
-# dynalloc
-	ori	$17, $28, 0
-# was:	ori	_read_stringres_4_, $28, 0
-	addi	$3, $16, 3
-# was:	addi	_tmp_23_, _size_reg_5_, 3
-	sra	$3, $3, 2
-# was:	sra	_tmp_23_, _tmp_23_, 2
-	sll	$3, $3, 2
-# was:	sll	_tmp_23_, _tmp_23_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_23_, _tmp_23_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_23_
-	sw	$16, 0($17)
-# was:	sw	_size_reg_5_, 0(_read_stringres_4_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_17_, _read_stringres_4_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_18_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_7_, _arr_reg_6_, 4
-_loop_beg_19_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_21_, _i_reg_18_, _size_reg_5_
-	bgez	$2, _loop_end_20_
-# was:	bgez	_tmp_reg_21_, _loop_end_20_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_8_, 0(_elem_reg_7_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_7_, _elem_reg_7_, 4
-# 	ori	$2,_res_reg_8_,0
-	jal	read_char
-# was:	jal	read_char, $2
-# 	ori	_tmp_reg_22_,$2,0
-# 	ori	_res_reg_8_,_tmp_reg_22_,0
-	sb	$2, 0($18)
-# was:	sb	_res_reg_8_, 0(_addr_reg_17_)
-	addi	$18, $18, 1
-# was:	addi	_addr_reg_17_, _addr_reg_17_, 1
-	addi	$19, $19, 1
-# was:	addi	_i_reg_18_, _i_reg_18_, 1
-	j	_loop_beg_19_
-_loop_end_20_:
-	ori	$2, $17, 0
-# was:	ori	$2, _read_stringres_4_, 0
-	addi	$29, $29, 28
-	lw	$20, -24($29)
-	lw	$19, -20($29)
-	lw	$18, -16($29)
-	lw	$17, -12($29)
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
-# Function add_one
-add_one:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_24_,$2,0
-# 	ori	_plus_L_26_,_param_x_24_,0
-	ori	$3, $0, 1
-# was:	ori	_plus_R_27_, $0, 1
-	add	$2, $2, $3
-# was:	add	_add_oneres_25_, _plus_L_26_, _plus_R_27_
-# 	ori	$2,_add_oneres_25_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
@@ -158,152 +28,234 @@ main:
 	addi	$29, $29, -28
 	jal	getint
 # was:	jal	getint, $2
-# 	ori	_letBind_29_,$2,0
-# 	ori	_arg_31_,_letBind_29_,0
-# 	ori	$2,_arg_31_,0
-	jal	read_string
-# was:	jal	read_string, $2
-# 	ori	_letBind_30_,$2,0
+# 	ori	_letBind_2_,$2,0
+	ori	$4, $2, 0
+# was:	ori	_letBind_4_, _letBind_2_, 0
 # map
-# map
-# map
-# 	ori	_arr_reg_42_,_letBind_30_,0
-	lw	$18, 0($2)
-# was:	lw	_size_reg_41_, 0(_arr_reg_42_)
+# 	ori	_size_reg_9_,_letBind_4_,0
+	bgez	$4, _safe_lab_10_
+# was:	bgez	_size_reg_9_, _safe_lab_10_
+	ori	$5, $0, 3
+# was:	ori	$5, $0, 3
+	la	$6, _Msg_IllegalArraySize_
+# was:	la	$6, _Msg_IllegalArraySize_
+	j	_RuntimeError_
+_safe_lab_10_:
 # dynalloc
-	ori	$20, $28, 0
-# was:	ori	_arr_reg_38_, $28, 0
-	sll	$3, $18, 2
-# was:	sll	_tmp_51_, _size_reg_41_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_51_, _tmp_51_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_51_
-	sw	$18, 0($20)
-# was:	sw	_size_reg_41_, 0(_arr_reg_38_)
-	addi	$17, $20, 4
-# was:	addi	_addr_reg_45_, _arr_reg_38_, 4
-	ori	$16, $0, 0
-# was:	ori	_i_reg_46_, $0, 0
-	addi	$19, $2, 4
-# was:	addi	_elem_reg_43_, _arr_reg_42_, 4
-_loop_beg_47_:
-	sub	$2, $16, $18
-# was:	sub	_tmp_reg_49_, _i_reg_46_, _size_reg_41_
-	bgez	$2, _loop_end_48_
-# was:	bgez	_tmp_reg_49_, _loop_end_48_
-	lb	$2, 0($19)
-# was:	lb	_res_reg_44_, 0(_elem_reg_43_)
-	addi	$19, $19, 1
-# was:	addi	_elem_reg_43_, _elem_reg_43_, 1
-# 	ori	$2,_res_reg_44_,0
-	jal	ord
-# was:	jal	ord, $2
-# 	ori	_tmp_reg_50_,$2,0
-# 	ori	_res_reg_44_,_tmp_reg_50_,0
-	sw	$2, 0($17)
-# was:	sw	_res_reg_44_, 0(_addr_reg_45_)
-	addi	$17, $17, 4
-# was:	addi	_addr_reg_45_, _addr_reg_45_, 4
+	ori	$3, $28, 0
+# was:	ori	_arr_reg_6_, $28, 0
+	sll	$5, $4, 2
+# was:	sll	_tmp_16_, _size_reg_9_, 2
+	addi	$5, $5, 4
+# was:	addi	_tmp_16_, _tmp_16_, 4
+	add	$28, $28, $5
+# was:	add	$28, $28, _tmp_16_
+	sw	$4, 0($3)
+# was:	sw	_size_reg_9_, 0(_arr_reg_6_)
+	addi	$5, $3, 4
+# was:	addi	_addr_reg_11_, _arr_reg_6_, 4
+	ori	$7, $0, 0
+# was:	ori	_i_reg_12_, $0, 0
+_loop_beg_13_:
+	sub	$6, $7, $4
+# was:	sub	_tmp_reg_15_, _i_reg_12_, _size_reg_9_
+	bgez	$6, _loop_end_14_
+# was:	bgez	_tmp_reg_15_, _loop_end_14_
+	sw	$7, 0($5)
+# was:	sw	_i_reg_12_, 0(_addr_reg_11_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_11_, _addr_reg_11_, 4
+	addi	$7, $7, 1
+# was:	addi	_i_reg_12_, _i_reg_12_, 1
+	j	_loop_beg_13_
+_loop_end_14_:
+	lw	$17, 0($3)
+# was:	lw	_size_reg_5_, 0(_arr_reg_6_)
+# dynalloc
+	ori	$18, $28, 0
+# was:	ori	_letBind_3_, $28, 0
+	addi	$4, $17, 3
+# was:	addi	_tmp_23_, _size_reg_5_, 3
+	sra	$4, $4, 2
+# was:	sra	_tmp_23_, _tmp_23_, 2
+	sll	$4, $4, 2
+# was:	sll	_tmp_23_, _tmp_23_, 2
+	addi	$4, $4, 4
+# was:	addi	_tmp_23_, _tmp_23_, 4
+	add	$28, $28, $4
+# was:	add	$28, $28, _tmp_23_
+	sw	$17, 0($18)
+# was:	sw	_size_reg_5_, 0(_letBind_3_)
+	addi	$16, $18, 4
+# was:	addi	_addr_reg_17_, _letBind_3_, 4
+	ori	$19, $0, 0
+# was:	ori	_i_reg_18_, $0, 0
+	addi	$20, $3, 4
+# was:	addi	_elem_reg_7_, _arr_reg_6_, 4
+_loop_beg_19_:
+	sub	$3, $19, $17
+# was:	sub	_tmp_reg_21_, _i_reg_18_, _size_reg_5_
+	bgez	$3, _loop_end_20_
+# was:	bgez	_tmp_reg_21_, _loop_end_20_
+	lw	$3, 0($20)
+# was:	lw	_res_reg_8_, 0(_elem_reg_7_)
+	addi	$20, $20, 4
+# was:	addi	_elem_reg_7_, _elem_reg_7_, 4
+	jal	getchar
+# was:	jal	getchar, $2
+# 	ori	_fun_arg_res_22_,$2,0
+	ori	$3, $2, 0
+# was:	ori	_res_reg_8_, _fun_arg_res_22_, 0
+	sb	$3, 0($16)
+# was:	sb	_res_reg_8_, 0(_addr_reg_17_)
 	addi	$16, $16, 1
-# was:	addi	_i_reg_46_, _i_reg_46_, 1
-	j	_loop_beg_47_
-_loop_end_48_:
-	lw	$19, 0($20)
-# was:	lw	_size_reg_37_, 0(_arr_reg_38_)
-# dynalloc
-	ori	$16, $28, 0
-# was:	ori	_arr_reg_34_, $28, 0
-	sll	$2, $19, 2
-# was:	sll	_tmp_58_, _size_reg_37_, 2
-	addi	$2, $2, 4
-# was:	addi	_tmp_58_, _tmp_58_, 4
-	add	$28, $28, $2
-# was:	add	$28, $28, _tmp_58_
-	sw	$19, 0($16)
-# was:	sw	_size_reg_37_, 0(_arr_reg_34_)
-	addi	$18, $16, 4
-# was:	addi	_addr_reg_52_, _arr_reg_34_, 4
-	ori	$17, $0, 0
-# was:	ori	_i_reg_53_, $0, 0
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_39_, _arr_reg_38_, 4
-_loop_beg_54_:
-	sub	$2, $17, $19
-# was:	sub	_tmp_reg_56_, _i_reg_53_, _size_reg_37_
-	bgez	$2, _loop_end_55_
-# was:	bgez	_tmp_reg_56_, _loop_end_55_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_40_, 0(_elem_reg_39_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_39_, _elem_reg_39_, 4
-# 	ori	$2,_res_reg_40_,0
-	jal	add_one
-# was:	jal	add_one, $2
-# 	ori	_tmp_reg_57_,$2,0
-# 	ori	_res_reg_40_,_tmp_reg_57_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_40_, 0(_addr_reg_52_)
-	addi	$18, $18, 4
-# was:	addi	_addr_reg_52_, _addr_reg_52_, 4
-	addi	$17, $17, 1
-# was:	addi	_i_reg_53_, _i_reg_53_, 1
-	j	_loop_beg_54_
-_loop_end_55_:
-	lw	$18, 0($16)
+# was:	addi	_addr_reg_17_, _addr_reg_17_, 1
+	addi	$19, $19, 1
+# was:	addi	_i_reg_18_, _i_reg_18_, 1
+	j	_loop_beg_19_
+_loop_end_20_:
+# map
+# map
+# map
+	ori	$2, $18, 0
+# was:	ori	_arr_reg_34_, _letBind_3_, 0
+	lw	$18, 0($2)
 # was:	lw	_size_reg_33_, 0(_arr_reg_34_)
 # dynalloc
-	ori	$17, $28, 0
-# was:	ori	_letBind_32_, $28, 0
-	addi	$2, $18, 3
-# was:	addi	_tmp_65_, _size_reg_33_, 3
-	sra	$2, $2, 2
-# was:	sra	_tmp_65_, _tmp_65_, 2
-	sll	$2, $2, 2
-# was:	sll	_tmp_65_, _tmp_65_, 2
-	addi	$2, $2, 4
-# was:	addi	_tmp_65_, _tmp_65_, 4
-	add	$28, $28, $2
-# was:	add	$28, $28, _tmp_65_
-	sw	$18, 0($17)
-# was:	sw	_size_reg_33_, 0(_letBind_32_)
-	addi	$19, $17, 4
-# was:	addi	_addr_reg_59_, _letBind_32_, 4
-	ori	$20, $0, 0
-# was:	ori	_i_reg_60_, $0, 0
-	addi	$16, $16, 4
+	ori	$16, $28, 0
+# was:	ori	_arr_reg_30_, $28, 0
+	sll	$3, $18, 2
+# was:	sll	_tmp_43_, _size_reg_33_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_43_, _tmp_43_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_43_
+	sw	$18, 0($16)
+# was:	sw	_size_reg_33_, 0(_arr_reg_30_)
+	addi	$19, $16, 4
+# was:	addi	_addr_reg_37_, _arr_reg_30_, 4
+	ori	$17, $0, 0
+# was:	ori	_i_reg_38_, $0, 0
+	addi	$20, $2, 4
 # was:	addi	_elem_reg_35_, _arr_reg_34_, 4
-_loop_beg_61_:
-	sub	$2, $20, $18
-# was:	sub	_tmp_reg_63_, _i_reg_60_, _size_reg_33_
-	bgez	$2, _loop_end_62_
-# was:	bgez	_tmp_reg_63_, _loop_end_62_
-	lw	$2, 0($16)
-# was:	lw	_res_reg_36_, 0(_elem_reg_35_)
-	addi	$16, $16, 4
-# was:	addi	_elem_reg_35_, _elem_reg_35_, 4
+_loop_beg_39_:
+	sub	$2, $17, $18
+# was:	sub	_tmp_reg_41_, _i_reg_38_, _size_reg_33_
+	bgez	$2, _loop_end_40_
+# was:	bgez	_tmp_reg_41_, _loop_end_40_
+	lb	$2, 0($20)
+# was:	lb	_res_reg_36_, 0(_elem_reg_35_)
+	addi	$20, $20, 1
+# was:	addi	_elem_reg_35_, _elem_reg_35_, 1
 # 	ori	$2,_res_reg_36_,0
+	jal	ord
+# was:	jal	ord, $2
+# 	ori	_tmp_reg_42_,$2,0
+# 	ori	_res_reg_36_,_tmp_reg_42_,0
+	sw	$2, 0($19)
+# was:	sw	_res_reg_36_, 0(_addr_reg_37_)
+	addi	$19, $19, 4
+# was:	addi	_addr_reg_37_, _addr_reg_37_, 4
+	addi	$17, $17, 1
+# was:	addi	_i_reg_38_, _i_reg_38_, 1
+	j	_loop_beg_39_
+_loop_end_40_:
+	lw	$3, 0($16)
+# was:	lw	_size_reg_29_, 0(_arr_reg_30_)
+# dynalloc
+	ori	$2, $28, 0
+# was:	ori	_arr_reg_26_, $28, 0
+	sll	$4, $3, 2
+# was:	sll	_tmp_52_, _size_reg_29_, 2
+	addi	$4, $4, 4
+# was:	addi	_tmp_52_, _tmp_52_, 4
+	add	$28, $28, $4
+# was:	add	$28, $28, _tmp_52_
+	sw	$3, 0($2)
+# was:	sw	_size_reg_29_, 0(_arr_reg_26_)
+	addi	$5, $2, 4
+# was:	addi	_addr_reg_44_, _arr_reg_26_, 4
+	ori	$4, $0, 0
+# was:	ori	_i_reg_45_, $0, 0
+	addi	$6, $16, 4
+# was:	addi	_elem_reg_31_, _arr_reg_30_, 4
+_loop_beg_46_:
+	sub	$7, $4, $3
+# was:	sub	_tmp_reg_48_, _i_reg_45_, _size_reg_29_
+	bgez	$7, _loop_end_47_
+# was:	bgez	_tmp_reg_48_, _loop_end_47_
+	lw	$8, 0($6)
+# was:	lw	_res_reg_32_, 0(_elem_reg_31_)
+	addi	$6, $6, 4
+# was:	addi	_elem_reg_31_, _elem_reg_31_, 4
+# 	ori	_plus_L_50_,_res_reg_32_,0
+	ori	$7, $0, 1
+# was:	ori	_plus_R_51_, $0, 1
+	add	$8, $8, $7
+# was:	add	_fun_arg_res_49_, _plus_L_50_, _plus_R_51_
+# 	ori	_res_reg_32_,_fun_arg_res_49_,0
+	sw	$8, 0($5)
+# was:	sw	_res_reg_32_, 0(_addr_reg_44_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_44_, _addr_reg_44_, 4
+	addi	$4, $4, 1
+# was:	addi	_i_reg_45_, _i_reg_45_, 1
+	j	_loop_beg_46_
+_loop_end_47_:
+	lw	$17, 0($2)
+# was:	lw	_size_reg_25_, 0(_arr_reg_26_)
+# dynalloc
+	ori	$16, $28, 0
+# was:	ori	_letBind_24_, $28, 0
+	addi	$3, $17, 3
+# was:	addi	_tmp_59_, _size_reg_25_, 3
+	sra	$3, $3, 2
+# was:	sra	_tmp_59_, _tmp_59_, 2
+	sll	$3, $3, 2
+# was:	sll	_tmp_59_, _tmp_59_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_59_, _tmp_59_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_59_
+	sw	$17, 0($16)
+# was:	sw	_size_reg_25_, 0(_letBind_24_)
+	addi	$18, $16, 4
+# was:	addi	_addr_reg_53_, _letBind_24_, 4
+	ori	$19, $0, 0
+# was:	ori	_i_reg_54_, $0, 0
+	addi	$20, $2, 4
+# was:	addi	_elem_reg_27_, _arr_reg_26_, 4
+_loop_beg_55_:
+	sub	$2, $19, $17
+# was:	sub	_tmp_reg_57_, _i_reg_54_, _size_reg_25_
+	bgez	$2, _loop_end_56_
+# was:	bgez	_tmp_reg_57_, _loop_end_56_
+	lw	$2, 0($20)
+# was:	lw	_res_reg_28_, 0(_elem_reg_27_)
+	addi	$20, $20, 4
+# was:	addi	_elem_reg_27_, _elem_reg_27_, 4
+# 	ori	$2,_res_reg_28_,0
 	jal	chr
 # was:	jal	chr, $2
-# 	ori	_tmp_reg_64_,$2,0
-# 	ori	_res_reg_36_,_tmp_reg_64_,0
-	sb	$2, 0($19)
-# was:	sb	_res_reg_36_, 0(_addr_reg_59_)
+# 	ori	_tmp_reg_58_,$2,0
+# 	ori	_res_reg_28_,_tmp_reg_58_,0
+	sb	$2, 0($18)
+# was:	sb	_res_reg_28_, 0(_addr_reg_53_)
+	addi	$18, $18, 1
+# was:	addi	_addr_reg_53_, _addr_reg_53_, 1
 	addi	$19, $19, 1
-# was:	addi	_addr_reg_59_, _addr_reg_59_, 1
-	addi	$20, $20, 1
-# was:	addi	_i_reg_60_, _i_reg_60_, 1
-	j	_loop_beg_61_
-_loop_end_62_:
-	ori	$2, $17, 0
-# was:	ori	_tmp_66_, _letBind_32_, 0
+# was:	addi	_i_reg_54_, _i_reg_54_, 1
+	j	_loop_beg_55_
+_loop_end_56_:
+	ori	$2, $16, 0
+# was:	ori	_tmp_60_, _letBind_24_, 0
 	ori	$16, $2, 0
-# was:	ori	_mainres_28_, _tmp_66_, 0
-# 	ori	$2,_tmp_66_,0
+# was:	ori	_mainres_1_, _tmp_60_, 0
+# 	ori	$2,_tmp_60_,0
 	jal	putstring
 # was:	jal	putstring, $2
 	ori	$2, $16, 0
-# was:	ori	$2, _mainres_28_, 0
+# was:	ori	$2, _mainres_1_, 0
 	addi	$29, $29, 28
 	lw	$20, -24($29)
 	lw	$19, -20($29)
diff --git a/tests/proj_figure3.asm b/tests/proj_figure3.asm
index b9c882e..1624941 100644
--- a/tests/proj_figure3.asm
+++ b/tests/proj_figure3.asm
@@ -17,245 +17,189 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function plus100
-plus100:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_1_,$2,0
-# 	ori	_plus_L_3_,_param_x_1_,0
-	ori	$3, $0, 100
-# was:	ori	_plus_R_4_, $0, 100
-	add	$2, $2, $3
-# was:	add	_plus100res_2_, _plus_L_3_, _plus_R_4_
-# 	ori	$2,_plus100res_2_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function plus
-plus:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_x_5_,$2,0
-# 	ori	_param_y_6_,$3,0
-# 	ori	_plus_L_8_,_param_x_5_,0
-# 	ori	_plus_R_9_,_param_y_6_,0
-	add	$2, $2, $3
-# was:	add	_plusres_7_, _plus_L_8_, _plus_R_9_
-# 	ori	$2,_plusres_7_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
-	sw	$21, -28($29)
 	sw	$20, -24($29)
 	sw	$19, -20($29)
 	sw	$18, -16($29)
 	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -32
+	addi	$29, $29, -28
 	jal	getint
 # was:	jal	getint, $2
-# 	ori	_letBind_11_,$2,0
-# 	ori	_size_reg_13_,_letBind_11_,0
-	bgez	$2, _safe_lab_14_
-# was:	bgez	_size_reg_13_, _safe_lab_14_
+# 	ori	_letBind_2_,$2,0
+	ori	$3, $2, 0
+# was:	ori	_size_reg_4_, _letBind_2_, 0
+	bgez	$3, _safe_lab_5_
+# was:	bgez	_size_reg_4_, _safe_lab_5_
 	ori	$5, $0, 6
 # was:	ori	$5, $0, 6
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_14_:
+_safe_lab_5_:
 # dynalloc
-	ori	$20, $28, 0
-# was:	ori	_letBind_12_, $28, 0
-	sll	$3, $2, 2
-# was:	sll	_tmp_20_, _size_reg_13_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_20_, _tmp_20_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_20_
-	sw	$2, 0($20)
-# was:	sw	_size_reg_13_, 0(_letBind_12_)
-	addi	$5, $20, 4
-# was:	addi	_addr_reg_15_, _letBind_12_, 4
-	ori	$3, $0, 0
-# was:	ori	_i_reg_16_, $0, 0
-_loop_beg_17_:
-	sub	$4, $3, $2
-# was:	sub	_tmp_reg_19_, _i_reg_16_, _size_reg_13_
-	bgez	$4, _loop_end_18_
-# was:	bgez	_tmp_reg_19_, _loop_end_18_
-	sw	$3, 0($5)
-# was:	sw	_i_reg_16_, 0(_addr_reg_15_)
+	ori	$6, $28, 0
+# was:	ori	_letBind_3_, $28, 0
+	sll	$2, $3, 2
+# was:	sll	_tmp_11_, _size_reg_4_, 2
+	addi	$2, $2, 4
+# was:	addi	_tmp_11_, _tmp_11_, 4
+	add	$28, $28, $2
+# was:	add	$28, $28, _tmp_11_
+	sw	$3, 0($6)
+# was:	sw	_size_reg_4_, 0(_letBind_3_)
+	addi	$5, $6, 4
+# was:	addi	_addr_reg_6_, _letBind_3_, 4
+	ori	$4, $0, 0
+# was:	ori	_i_reg_7_, $0, 0
+_loop_beg_8_:
+	sub	$2, $4, $3
+# was:	sub	_tmp_reg_10_, _i_reg_7_, _size_reg_4_
+	bgez	$2, _loop_end_9_
+# was:	bgez	_tmp_reg_10_, _loop_end_9_
+	sw	$4, 0($5)
+# was:	sw	_i_reg_7_, 0(_addr_reg_6_)
 	addi	$5, $5, 4
-# was:	addi	_addr_reg_15_, _addr_reg_15_, 4
-	addi	$3, $3, 1
-# was:	addi	_i_reg_16_, _i_reg_16_, 1
-	j	_loop_beg_17_
-_loop_end_18_:
+# was:	addi	_addr_reg_6_, _addr_reg_6_, 4
+	addi	$4, $4, 1
+# was:	addi	_i_reg_7_, _i_reg_7_, 1
+	j	_loop_beg_8_
+_loop_end_9_:
 # map
-# 	ori	_arr_reg_23_,_letBind_12_,0
-	lw	$17, 0($20)
-# was:	lw	_size_reg_22_, 0(_arr_reg_23_)
+# 	ori	_arr_reg_14_,_letBind_3_,0
+	lw	$2, 0($6)
+# was:	lw	_size_reg_13_, 0(_arr_reg_14_)
+# dynalloc
+	ori	$3, $28, 0
+# was:	ori	_letBind_12_, $28, 0
+	sll	$4, $2, 2
+# was:	sll	_tmp_25_, _size_reg_13_, 2
+	addi	$4, $4, 4
+# was:	addi	_tmp_25_, _tmp_25_, 4
+	add	$28, $28, $4
+# was:	add	$28, $28, _tmp_25_
+	sw	$2, 0($3)
+# was:	sw	_size_reg_13_, 0(_letBind_12_)
+	addi	$5, $3, 4
+# was:	addi	_addr_reg_17_, _letBind_12_, 4
+	ori	$4, $0, 0
+# was:	ori	_i_reg_18_, $0, 0
+	addi	$6, $6, 4
+# was:	addi	_elem_reg_15_, _arr_reg_14_, 4
+_loop_beg_19_:
+	sub	$7, $4, $2
+# was:	sub	_tmp_reg_21_, _i_reg_18_, _size_reg_13_
+	bgez	$7, _loop_end_20_
+# was:	bgez	_tmp_reg_21_, _loop_end_20_
+	lw	$7, 0($6)
+# was:	lw	_res_reg_16_, 0(_elem_reg_15_)
+	addi	$6, $6, 4
+# was:	addi	_elem_reg_15_, _elem_reg_15_, 4
+	ori	$8, $7, 0
+# was:	ori	_plus_L_23_, _res_reg_16_, 0
+	ori	$7, $0, 100
+# was:	ori	_plus_R_24_, $0, 100
+	add	$7, $8, $7
+# was:	add	_fun_arg_res_22_, _plus_L_23_, _plus_R_24_
+# 	ori	_res_reg_16_,_fun_arg_res_22_,0
+	sw	$7, 0($5)
+# was:	sw	_res_reg_16_, 0(_addr_reg_17_)
+	addi	$5, $5, 4
+# was:	addi	_addr_reg_17_, _addr_reg_17_, 4
+	addi	$4, $4, 1
+# was:	addi	_i_reg_18_, _i_reg_18_, 1
+	j	_loop_beg_19_
+_loop_end_20_:
+# map
+# 	ori	_arr_reg_28_,_letBind_12_,0
+	lw	$17, 0($3)
+# was:	lw	_size_reg_27_, 0(_arr_reg_28_)
 # dynalloc
 	ori	$16, $28, 0
-# was:	ori	_letBind_21_, $28, 0
-	sll	$2, $17, 2
-# was:	sll	_tmp_32_, _size_reg_22_, 2
+# was:	ori	_letBind_26_, $28, 0
+	addi	$2, $17, 3
+# was:	addi	_tmp_37_, _size_reg_27_, 3
+	sra	$2, $2, 2
+# was:	sra	_tmp_37_, _tmp_37_, 2
+	sll	$2, $2, 2
+# was:	sll	_tmp_37_, _tmp_37_, 2
 	addi	$2, $2, 4
-# was:	addi	_tmp_32_, _tmp_32_, 4
+# was:	addi	_tmp_37_, _tmp_37_, 4
 	add	$28, $28, $2
-# was:	add	$28, $28, _tmp_32_
+# was:	add	$28, $28, _tmp_37_
 	sw	$17, 0($16)
-# was:	sw	_size_reg_22_, 0(_letBind_21_)
+# was:	sw	_size_reg_27_, 0(_letBind_26_)
 	addi	$19, $16, 4
-# was:	addi	_addr_reg_26_, _letBind_21_, 4
+# was:	addi	_addr_reg_31_, _letBind_26_, 4
 	ori	$18, $0, 0
-# was:	ori	_i_reg_27_, $0, 0
-	addi	$21, $20, 4
-# was:	addi	_elem_reg_24_, _arr_reg_23_, 4
-_loop_beg_28_:
+# was:	ori	_i_reg_32_, $0, 0
+	addi	$20, $3, 4
+# was:	addi	_elem_reg_29_, _arr_reg_28_, 4
+_loop_beg_33_:
 	sub	$2, $18, $17
-# was:	sub	_tmp_reg_30_, _i_reg_27_, _size_reg_22_
-	bgez	$2, _loop_end_29_
-# was:	bgez	_tmp_reg_30_, _loop_end_29_
-	lw	$2, 0($21)
-# was:	lw	_res_reg_25_, 0(_elem_reg_24_)
-	addi	$21, $21, 4
-# was:	addi	_elem_reg_24_, _elem_reg_24_, 4
-# 	ori	$2,_res_reg_25_,0
-	jal	plus100
-# was:	jal	plus100, $2
-# 	ori	_tmp_reg_31_,$2,0
-# 	ori	_res_reg_25_,_tmp_reg_31_,0
-	sw	$2, 0($19)
-# was:	sw	_res_reg_25_, 0(_addr_reg_26_)
-	addi	$19, $19, 4
-# was:	addi	_addr_reg_26_, _addr_reg_26_, 4
-	addi	$18, $18, 1
-# was:	addi	_i_reg_27_, _i_reg_27_, 1
-	j	_loop_beg_28_
-_loop_end_29_:
-# 	ori	_arr_reg_34_,_letBind_12_,0
-	lw	$17, 0($20)
-# was:	lw	_size_reg_35_, 0(_arr_reg_34_)
-	ori	$2, $0, 0
-# was:	ori	_letBind_33_, $0, 0
-	addi	$20, $20, 4
-# was:	addi	_arr_reg_34_, _arr_reg_34_, 4
-	ori	$18, $0, 0
-# was:	ori	_ind_var_36_, $0, 0
-_loop_beg_38_:
-	sub	$3, $18, $17
-# was:	sub	_tmp_reg_37_, _ind_var_36_, _size_reg_35_
-	bgez	$3, _loop_end_39_
-# was:	bgez	_tmp_reg_37_, _loop_end_39_
-	lw	$3, 0($20)
-# was:	lw	_tmp_reg_37_, 0(_arr_reg_34_)
-	addi	$20, $20, 4
-# was:	addi	_arr_reg_34_, _arr_reg_34_, 4
-# 	ori	$2,_letBind_33_,0
-# 	ori	$3,_tmp_reg_37_,0
-	jal	plus
-# was:	jal	plus, $2 $3
-# 	ori	_tmp_reg_40_,$2,0
-# 	ori	_letBind_33_,_tmp_reg_40_,0
-	addi	$18, $18, 1
-# was:	addi	_ind_var_36_, _ind_var_36_, 1
-	j	_loop_beg_38_
-_loop_end_39_:
-# map
-	ori	$2, $16, 0
-# was:	ori	_arr_reg_43_, _letBind_21_, 0
-	lw	$16, 0($2)
-# was:	lw	_size_reg_42_, 0(_arr_reg_43_)
-# dynalloc
-	ori	$17, $28, 0
-# was:	ori	_letBind_41_, $28, 0
-	addi	$3, $16, 3
-# was:	addi	_tmp_52_, _size_reg_42_, 3
-	sra	$3, $3, 2
-# was:	sra	_tmp_52_, _tmp_52_, 2
-	sll	$3, $3, 2
-# was:	sll	_tmp_52_, _tmp_52_, 2
-	addi	$3, $3, 4
-# was:	addi	_tmp_52_, _tmp_52_, 4
-	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_52_
-	sw	$16, 0($17)
-# was:	sw	_size_reg_42_, 0(_letBind_41_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_46_, _letBind_41_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_47_, $0, 0
-	addi	$20, $2, 4
-# was:	addi	_elem_reg_44_, _arr_reg_43_, 4
-_loop_beg_48_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_50_, _i_reg_47_, _size_reg_42_
-	bgez	$2, _loop_end_49_
-# was:	bgez	_tmp_reg_50_, _loop_end_49_
+# was:	sub	_tmp_reg_35_, _i_reg_32_, _size_reg_27_
+	bgez	$2, _loop_end_34_
+# was:	bgez	_tmp_reg_35_, _loop_end_34_
 	lw	$2, 0($20)
-# was:	lw	_res_reg_45_, 0(_elem_reg_44_)
+# was:	lw	_res_reg_30_, 0(_elem_reg_29_)
 	addi	$20, $20, 4
-# was:	addi	_elem_reg_44_, _elem_reg_44_, 4
-# 	ori	$2,_res_reg_45_,0
+# was:	addi	_elem_reg_29_, _elem_reg_29_, 4
+# 	ori	$2,_res_reg_30_,0
 	jal	chr
 # was:	jal	chr, $2
-# 	ori	_tmp_reg_51_,$2,0
-# 	ori	_res_reg_45_,_tmp_reg_51_,0
-	sb	$2, 0($18)
-# was:	sb	_res_reg_45_, 0(_addr_reg_46_)
-	addi	$18, $18, 1
-# was:	addi	_addr_reg_46_, _addr_reg_46_, 1
+# 	ori	_tmp_reg_36_,$2,0
+# 	ori	_res_reg_30_,_tmp_reg_36_,0
+	sb	$2, 0($19)
+# was:	sb	_res_reg_30_, 0(_addr_reg_31_)
 	addi	$19, $19, 1
-# was:	addi	_i_reg_47_, _i_reg_47_, 1
-	j	_loop_beg_48_
-_loop_end_49_:
+# was:	addi	_addr_reg_31_, _addr_reg_31_, 1
+	addi	$18, $18, 1
+# was:	addi	_i_reg_32_, _i_reg_32_, 1
+	j	_loop_beg_33_
+_loop_end_34_:
 	ori	$2, $0, 1
-# was:	ori	_arr_ind_56_, $0, 1
-	addi	$3, $17, 4
-# was:	addi	_arr_reg_57_, _letBind_41_, 4
-	lw	$4, 0($17)
-# was:	lw	_size_reg_58_, 0(_letBind_41_)
-	bgez	$2, _safe_lab_61_
-# was:	bgez	_arr_ind_56_, _safe_lab_61_
-_error_lab_60_:
+# was:	ori	_arr_ind_41_, $0, 1
+	addi	$3, $16, 4
+# was:	addi	_arr_reg_42_, _letBind_26_, 4
+	lw	$4, 0($16)
+# was:	lw	_size_reg_43_, 0(_letBind_26_)
+	bgez	$2, _safe_lab_46_
+# was:	bgez	_arr_ind_41_, _safe_lab_46_
+_error_lab_45_:
 	ori	$5, $0, 10
 # was:	ori	$5, $0, 10
 	la	$6, _Msg_IllegalIndex_
 # was:	la	$6, _Msg_IllegalIndex_
 	j	_RuntimeError_
-_safe_lab_61_:
+_safe_lab_46_:
 	sub	$4, $2, $4
-# was:	sub	_tmp_reg_59_, _arr_ind_56_, _size_reg_58_
-	bgez	$4, _error_lab_60_
-# was:	bgez	_tmp_reg_59_, _error_lab_60_
+# was:	sub	_tmp_reg_44_, _arr_ind_41_, _size_reg_43_
+	bgez	$4, _error_lab_45_
+# was:	bgez	_tmp_reg_44_, _error_lab_45_
 	add	$3, $3, $2
-# was:	add	_arr_reg_57_, _arr_reg_57_, _arr_ind_56_
+# was:	add	_arr_reg_42_, _arr_reg_42_, _arr_ind_41_
 	lb	$2, 0($3)
-# was:	lb	_arg_55_, 0(_arr_reg_57_)
-# 	ori	$2,_arg_55_,0
+# was:	lb	_arg_40_, 0(_arr_reg_42_)
+# 	ori	$2,_arg_40_,0
 	jal	ord
 # was:	jal	ord, $2
-# 	ori	_tmp_54_,$2,0
-# 	ori	_letBind_53_,_tmp_54_,0
-# 	ori	$2,_letBind_53_,0
+# 	ori	_tmp_39_,$2,0
+# 	ori	_letBind_38_,_tmp_39_,0
+# 	ori	$2,_letBind_38_,0
 	jal	putint
 # was:	jal	putint, $2
-	ori	$2, $17, 0
-# was:	ori	_tmp_62_, _letBind_41_, 0
+	ori	$2, $16, 0
+# was:	ori	_tmp_47_, _letBind_26_, 0
 	ori	$16, $2, 0
-# was:	ori	_mainres_10_, _tmp_62_, 0
-# 	ori	$2,_tmp_62_,0
+# was:	ori	_mainres_1_, _tmp_47_, 0
+# 	ori	$2,_tmp_47_,0
 	jal	putstring
 # was:	jal	putstring, $2
 	ori	$2, $16, 0
-# was:	ori	$2, _mainres_10_, 0
-	addi	$29, $29, 32
-	lw	$21, -28($29)
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 28
 	lw	$20, -24($29)
 	lw	$19, -20($29)
 	lw	$18, -16($29)
diff --git a/tests/reduce.asm b/tests/reduce.asm
index 49495b9..d8a7252 100644
--- a/tests/reduce.asm
+++ b/tests/reduce.asm
@@ -17,99 +17,80 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function incr
-incr:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_a_1_,$2,0
-# 	ori	_param_b_2_,$3,0
-# 	ori	_plus_L_4_,_param_a_1_,0
-# 	ori	_plus_R_5_,_param_b_2_,0
-	add	$2, $2, $3
-# was:	add	_incrres_3_, _plus_L_4_, _plus_R_5_
-# 	ori	$2,_incrres_3_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
-	sw	$18, -16($29)
-	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -20
-	ori	$3, $0, 3
-# was:	ori	_size_reg_14_, $0, 3
+	addi	$29, $29, -12
+	ori	$4, $0, 3
+# was:	ori	_size_reg_9_, $0, 3
 # dynalloc
-	ori	$16, $28, 0
-# was:	ori	_arr_reg_8_, $28, 0
-	sll	$2, $3, 2
-# was:	sll	_tmp_17_, _size_reg_14_, 2
+	ori	$2, $28, 0
+# was:	ori	_arr_reg_3_, $28, 0
+	sll	$3, $4, 2
+# was:	sll	_tmp_12_, _size_reg_9_, 2
+	addi	$3, $3, 4
+# was:	addi	_tmp_12_, _tmp_12_, 4
+	add	$28, $28, $3
+# was:	add	$28, $28, _tmp_12_
+	sw	$4, 0($2)
+# was:	sw	_size_reg_9_, 0(_arr_reg_3_)
+	addi	$4, $2, 4
+# was:	addi	_addr_reg_10_, _arr_reg_3_, 4
+	ori	$3, $0, 1
+# was:	ori	_tmp_reg_11_, $0, 1
+	sw	$3, 0($4)
+# was:	sw	_tmp_reg_11_, 0(_addr_reg_10_)
+	addi	$4, $4, 4
+# was:	addi	_addr_reg_10_, _addr_reg_10_, 4
+	ori	$3, $0, 2
+# was:	ori	_tmp_reg_11_, $0, 2
+	sw	$3, 0($4)
+# was:	sw	_tmp_reg_11_, 0(_addr_reg_10_)
+	addi	$4, $4, 4
+# was:	addi	_addr_reg_10_, _addr_reg_10_, 4
+	ori	$3, $0, 3
+# was:	ori	_tmp_reg_11_, $0, 3
+	sw	$3, 0($4)
+# was:	sw	_tmp_reg_11_, 0(_addr_reg_10_)
+	addi	$4, $4, 4
+# was:	addi	_addr_reg_10_, _addr_reg_10_, 4
+	lw	$3, 0($2)
+# was:	lw	_size_reg_4_, 0(_arr_reg_3_)
+	ori	$6, $0, 0
+# was:	ori	_letBind_2_, $0, 0
 	addi	$2, $2, 4
-# was:	addi	_tmp_17_, _tmp_17_, 4
-	add	$28, $28, $2
-# was:	add	$28, $28, _tmp_17_
-	sw	$3, 0($16)
-# was:	sw	_size_reg_14_, 0(_arr_reg_8_)
-	addi	$3, $16, 4
-# was:	addi	_addr_reg_15_, _arr_reg_8_, 4
-	ori	$2, $0, 1
-# was:	ori	_tmp_reg_16_, $0, 1
-	sw	$2, 0($3)
-# was:	sw	_tmp_reg_16_, 0(_addr_reg_15_)
-	addi	$3, $3, 4
-# was:	addi	_addr_reg_15_, _addr_reg_15_, 4
-	ori	$2, $0, 2
-# was:	ori	_tmp_reg_16_, $0, 2
-	sw	$2, 0($3)
-# was:	sw	_tmp_reg_16_, 0(_addr_reg_15_)
-	addi	$3, $3, 4
-# was:	addi	_addr_reg_15_, _addr_reg_15_, 4
-	ori	$2, $0, 3
-# was:	ori	_tmp_reg_16_, $0, 3
-	sw	$2, 0($3)
-# was:	sw	_tmp_reg_16_, 0(_addr_reg_15_)
-	addi	$3, $3, 4
-# was:	addi	_addr_reg_15_, _addr_reg_15_, 4
-	lw	$17, 0($16)
-# was:	lw	_size_reg_9_, 0(_arr_reg_8_)
-	ori	$2, $0, 0
-# was:	ori	_letBind_7_, $0, 0
-	addi	$16, $16, 4
-# was:	addi	_arr_reg_8_, _arr_reg_8_, 4
-	ori	$18, $0, 0
-# was:	ori	_ind_var_10_, $0, 0
-_loop_beg_12_:
-	sub	$3, $18, $17
-# was:	sub	_tmp_reg_11_, _ind_var_10_, _size_reg_9_
-	bgez	$3, _loop_end_13_
-# was:	bgez	_tmp_reg_11_, _loop_end_13_
-	lw	$3, 0($16)
-# was:	lw	_tmp_reg_11_, 0(_arr_reg_8_)
-	addi	$16, $16, 4
-# was:	addi	_arr_reg_8_, _arr_reg_8_, 4
-# 	ori	$2,_letBind_7_,0
-# 	ori	$3,_tmp_reg_11_,0
-	jal	incr
-# was:	jal	incr, $2 $3
-# 	ori	_tmp_reg_18_,$2,0
-# 	ori	_letBind_7_,_tmp_reg_18_,0
-	addi	$18, $18, 1
-# was:	addi	_ind_var_10_, _ind_var_10_, 1
-	j	_loop_beg_12_
-_loop_end_13_:
-# 	ori	_tmp_19_,_letBind_7_,0
-	ori	$16, $2, 0
-# was:	ori	_mainres_6_, _tmp_19_, 0
+# was:	addi	_arr_reg_3_, _arr_reg_3_, 4
+	ori	$4, $0, 0
+# was:	ori	_ind_var_5_, $0, 0
+_loop_beg_7_:
+	sub	$5, $4, $3
+# was:	sub	_tmp_reg_6_, _ind_var_5_, _size_reg_4_
+	bgez	$5, _loop_end_8_
+# was:	bgez	_tmp_reg_6_, _loop_end_8_
+	lw	$5, 0($2)
+# was:	lw	_tmp_reg_6_, 0(_arr_reg_3_)
+	addi	$2, $2, 4
+# was:	addi	_arr_reg_3_, _arr_reg_3_, 4
+# 	ori	_plus_L_14_,_letBind_2_,0
+# 	ori	_plus_R_15_,_tmp_reg_6_,0
+	add	$6, $6, $5
+# was:	add	_fun_arg_res_13_, _plus_L_14_, _plus_R_15_
+# 	ori	_letBind_2_,_fun_arg_res_13_,0
+	addi	$4, $4, 1
+# was:	addi	_ind_var_5_, _ind_var_5_, 1
+	j	_loop_beg_7_
+_loop_end_8_:
+# 	ori	_tmp_16_,_letBind_2_,0
+	ori	$16, $6, 0
+# was:	ori	_mainres_1_, _tmp_16_, 0
 	ori	$2, $16, 0
-# was:	ori	$2, _mainres_6_, 0
+# was:	ori	$2, _mainres_1_, 0
 	jal	putint
 # was:	jal	putint, $2
 	ori	$2, $16, 0
-# was:	ori	$2, _mainres_6_, 0
-	addi	$29, $29, 20
-	lw	$18, -16($29)
-	lw	$17, -12($29)
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 12
 	lw	$16, -8($29)
 	lw	$31, -4($29)
 	jr	$31
diff --git a/tests/replicate.asm b/tests/replicate.asm
index 0140378..3da234f 100644
--- a/tests/replicate.asm
+++ b/tests/replicate.asm
@@ -17,129 +17,114 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function writeBool
-writeBool:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-# 	ori	_param_b_1_,$2,0
-	ori	$16, $2, 0
-# was:	ori	_tmp_3_, _param_b_1_, 0
-# 	ori	_writeBoolres_2_,_tmp_3_,0
-	la	$2, _true
-# was:	la	$2, _true
-	bne	$16, $0, _wBoolF_4_
-# was:	bne	_writeBoolres_2_, $0, _wBoolF_4_
-	la	$2, _false
-# was:	la	$2, _false
-_wBoolF_4_:
-	jal	putstring
-# was:	jal	putstring, $2
-	ori	$2, $16, 0
-# was:	ori	$2, _writeBoolres_2_, 0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
+	sw	$21, -28($29)
 	sw	$20, -24($29)
 	sw	$19, -20($29)
 	sw	$18, -16($29)
 	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -28
+	addi	$29, $29, -32
 	ori	$2, $0, 7
-# was:	ori	_size_reg_7_, $0, 7
+# was:	ori	_size_reg_3_, $0, 7
 	ori	$7, $0, 0
-# was:	ori	_a_reg_8_, $0, 0
-	bgez	$2, _safe_lab_9_
-# was:	bgez	_size_reg_7_, _safe_lab_9_
+# was:	ori	_a_reg_4_, $0, 0
+	bgez	$2, _safe_lab_5_
+# was:	bgez	_size_reg_3_, _safe_lab_5_
 	ori	$5, $0, 4
 # was:	ori	$5, $0, 4
 	la	$6, _Msg_IllegalArraySize_
 # was:	la	$6, _Msg_IllegalArraySize_
 	j	_RuntimeError_
-_safe_lab_9_:
+_safe_lab_5_:
 # dynalloc
 	ori	$3, $28, 0
-# was:	ori	_letBind_6_, $28, 0
+# was:	ori	_letBind_2_, $28, 0
 	sll	$4, $2, 2
-# was:	sll	_tmp_15_, _size_reg_7_, 2
+# was:	sll	_tmp_11_, _size_reg_3_, 2
 	addi	$4, $4, 4
-# was:	addi	_tmp_15_, _tmp_15_, 4
+# was:	addi	_tmp_11_, _tmp_11_, 4
 	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_15_
+# was:	add	$28, $28, _tmp_11_
 	sw	$2, 0($3)
-# was:	sw	_size_reg_7_, 0(_letBind_6_)
-	addi	$6, $3, 4
-# was:	addi	_addr_reg_10_, _letBind_6_, 4
+# was:	sw	_size_reg_3_, 0(_letBind_2_)
+	addi	$4, $3, 4
+# was:	addi	_addr_reg_6_, _letBind_2_, 4
 	ori	$5, $0, 0
-# was:	ori	_i_reg_11_, $0, 0
-_loop_beg_12_:
-	sub	$4, $5, $2
-# was:	sub	_tmp_reg_14_, _i_reg_11_, _size_reg_7_
-	bgez	$4, _loop_end_13_
-# was:	bgez	_tmp_reg_14_, _loop_end_13_
-	sb	$7, 0($6)
-# was:	sb	_a_reg_8_, 0(_addr_reg_10_)
-	addi	$6, $6, 4
-# was:	addi	_addr_reg_10_, _addr_reg_10_, 4
+# was:	ori	_i_reg_7_, $0, 0
+_loop_beg_8_:
+	sub	$6, $5, $2
+# was:	sub	_tmp_reg_10_, _i_reg_7_, _size_reg_3_
+	bgez	$6, _loop_end_9_
+# was:	bgez	_tmp_reg_10_, _loop_end_9_
+	sb	$7, 0($4)
+# was:	sb	_a_reg_4_, 0(_addr_reg_6_)
+	addi	$4, $4, 4
+# was:	addi	_addr_reg_6_, _addr_reg_6_, 4
 	addi	$5, $5, 1
-# was:	addi	_i_reg_11_, _i_reg_11_, 1
-	j	_loop_beg_12_
-_loop_end_13_:
+# was:	addi	_i_reg_7_, _i_reg_7_, 1
+	j	_loop_beg_8_
+_loop_end_9_:
 # map
-# 	ori	_arr_reg_17_,_letBind_6_,0
+# 	ori	_arr_reg_13_,_letBind_2_,0
 	lw	$16, 0($3)
-# was:	lw	_size_reg_16_, 0(_arr_reg_17_)
+# was:	lw	_size_reg_12_, 0(_arr_reg_13_)
 # dynalloc
 	ori	$17, $28, 0
-# was:	ori	_mainres_5_, $28, 0
+# was:	ori	_mainres_1_, $28, 0
 	addi	$2, $16, 3
-# was:	addi	_tmp_26_, _size_reg_16_, 3
+# was:	addi	_tmp_24_, _size_reg_12_, 3
 	sra	$2, $2, 2
-# was:	sra	_tmp_26_, _tmp_26_, 2
+# was:	sra	_tmp_24_, _tmp_24_, 2
 	sll	$2, $2, 2
-# was:	sll	_tmp_26_, _tmp_26_, 2
+# was:	sll	_tmp_24_, _tmp_24_, 2
 	addi	$2, $2, 4
-# was:	addi	_tmp_26_, _tmp_26_, 4
+# was:	addi	_tmp_24_, _tmp_24_, 4
 	add	$28, $28, $2
-# was:	add	$28, $28, _tmp_26_
+# was:	add	$28, $28, _tmp_24_
 	sw	$16, 0($17)
-# was:	sw	_size_reg_16_, 0(_mainres_5_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_20_, _mainres_5_, 4
-	ori	$19, $0, 0
-# was:	ori	_i_reg_21_, $0, 0
+# was:	sw	_size_reg_12_, 0(_mainres_1_)
+	addi	$19, $17, 4
+# was:	addi	_addr_reg_16_, _mainres_1_, 4
+	ori	$18, $0, 0
+# was:	ori	_i_reg_17_, $0, 0
 	addi	$20, $3, 4
-# was:	addi	_elem_reg_18_, _arr_reg_17_, 4
-_loop_beg_22_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_24_, _i_reg_21_, _size_reg_16_
-	bgez	$2, _loop_end_23_
-# was:	bgez	_tmp_reg_24_, _loop_end_23_
-	lb	$2, 0($20)
-# was:	lb	_res_reg_19_, 0(_elem_reg_18_)
+# was:	addi	_elem_reg_14_, _arr_reg_13_, 4
+_loop_beg_18_:
+	sub	$2, $18, $16
+# was:	sub	_tmp_reg_20_, _i_reg_17_, _size_reg_12_
+	bgez	$2, _loop_end_19_
+# was:	bgez	_tmp_reg_20_, _loop_end_19_
+	lb	$21, 0($20)
+# was:	lb	_res_reg_15_, 0(_elem_reg_14_)
 	addi	$20, $20, 1
-# was:	addi	_elem_reg_18_, _elem_reg_18_, 1
-# 	ori	$2,_res_reg_19_,0
-	jal	writeBool
-# was:	jal	writeBool, $2
-# 	ori	_tmp_reg_25_,$2,0
-# 	ori	_res_reg_19_,_tmp_reg_25_,0
-	sb	$2, 0($18)
-# was:	sb	_res_reg_19_, 0(_addr_reg_20_)
-	addi	$18, $18, 1
-# was:	addi	_addr_reg_20_, _addr_reg_20_, 1
+# was:	addi	_elem_reg_14_, _elem_reg_14_, 1
+# 	ori	_tmp_22_,_res_reg_15_,0
+# 	ori	_fun_arg_res_21_,_tmp_22_,0
+	la	$2, _true
+# was:	la	$2, _true
+	bne	$21, $0, _wBoolF_23_
+# was:	bne	_fun_arg_res_21_, $0, _wBoolF_23_
+	la	$2, _false
+# was:	la	$2, _false
+_wBoolF_23_:
+	jal	putstring
+# was:	jal	putstring, $2
+# 	ori	_res_reg_15_,_fun_arg_res_21_,0
+	sb	$21, 0($19)
+# was:	sb	_res_reg_15_, 0(_addr_reg_16_)
 	addi	$19, $19, 1
-# was:	addi	_i_reg_21_, _i_reg_21_, 1
-	j	_loop_beg_22_
-_loop_end_23_:
+# was:	addi	_addr_reg_16_, _addr_reg_16_, 1
+	addi	$18, $18, 1
+# was:	addi	_i_reg_17_, _i_reg_17_, 1
+	j	_loop_beg_18_
+_loop_end_19_:
 	ori	$2, $17, 0
-# was:	ori	$2, _mainres_5_, 0
-	addi	$29, $29, 28
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 32
+	lw	$21, -28($29)
 	lw	$20, -24($29)
 	lw	$19, -20($29)
 	lw	$18, -16($29)
diff --git a/tests/scan.asm b/tests/scan.asm
index 0237959..e536b1f 100644
--- a/tests/scan.asm
+++ b/tests/scan.asm
@@ -17,173 +17,142 @@
 _stop_:
 	ori	$2, $0, 10
 	syscall
-# Function incr
-incr:
-	sw	$31, -4($29)
-	addi	$29, $29, -8
-# 	ori	_param_a_1_,$2,0
-# 	ori	_param_b_2_,$3,0
-# 	ori	_plus_L_4_,_param_a_1_,0
-# 	ori	_plus_R_5_,_param_b_2_,0
-	add	$2, $2, $3
-# was:	add	_incrres_3_, _plus_L_4_, _plus_R_5_
-# 	ori	$2,_incrres_3_,0
-	addi	$29, $29, 8
-	lw	$31, -4($29)
-	jr	$31
-# Function writeInt
-writeInt:
-	sw	$31, -4($29)
-	sw	$16, -8($29)
-	addi	$29, $29, -12
-# 	ori	_param_n_6_,$2,0
-	ori	$16, $2, 0
-# was:	ori	_tmp_8_, _param_n_6_, 0
-# 	ori	_writeIntres_7_,_tmp_8_,0
-	ori	$2, $16, 0
-# was:	ori	$2, _writeIntres_7_, 0
-	jal	putint
-# was:	jal	putint, $2
-	ori	$2, $16, 0
-# was:	ori	$2, _writeIntres_7_, 0
-	addi	$29, $29, 12
-	lw	$16, -8($29)
-	lw	$31, -4($29)
-	jr	$31
 # Function main
 main:
 	sw	$31, -4($29)
+	sw	$21, -28($29)
 	sw	$20, -24($29)
 	sw	$19, -20($29)
 	sw	$18, -16($29)
 	sw	$17, -12($29)
 	sw	$16, -8($29)
-	addi	$29, $29, -28
-	ori	$2, $0, 3
-# was:	ori	_size_reg_11_, $0, 3
+	addi	$29, $29, -32
+	ori	$3, $0, 3
+# was:	ori	_size_reg_3_, $0, 3
 # dynalloc
-	ori	$3, $28, 0
-# was:	ori	_letBind_10_, $28, 0
-	sll	$4, $2, 2
-# was:	sll	_tmp_14_, _size_reg_11_, 2
-	addi	$4, $4, 4
-# was:	addi	_tmp_14_, _tmp_14_, 4
-	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_14_
+	ori	$6, $28, 0
+# was:	ori	_letBind_2_, $28, 0
+	sll	$2, $3, 2
+# was:	sll	_tmp_6_, _size_reg_3_, 2
+	addi	$2, $2, 4
+# was:	addi	_tmp_6_, _tmp_6_, 4
+	add	$28, $28, $2
+# was:	add	$28, $28, _tmp_6_
+	sw	$3, 0($6)
+# was:	sw	_size_reg_3_, 0(_letBind_2_)
+	addi	$3, $6, 4
+# was:	addi	_addr_reg_4_, _letBind_2_, 4
+	ori	$2, $0, 1
+# was:	ori	_tmp_reg_5_, $0, 1
 	sw	$2, 0($3)
-# was:	sw	_size_reg_11_, 0(_letBind_10_)
-	addi	$2, $3, 4
-# was:	addi	_addr_reg_12_, _letBind_10_, 4
-	ori	$4, $0, 1
-# was:	ori	_tmp_reg_13_, $0, 1
-	sw	$4, 0($2)
-# was:	sw	_tmp_reg_13_, 0(_addr_reg_12_)
-	addi	$2, $2, 4
-# was:	addi	_addr_reg_12_, _addr_reg_12_, 4
-	ori	$4, $0, 2
-# was:	ori	_tmp_reg_13_, $0, 2
-	sw	$4, 0($2)
-# was:	sw	_tmp_reg_13_, 0(_addr_reg_12_)
-	addi	$2, $2, 4
-# was:	addi	_addr_reg_12_, _addr_reg_12_, 4
-	ori	$4, $0, 3
-# was:	ori	_tmp_reg_13_, $0, 3
-	sw	$4, 0($2)
-# was:	sw	_tmp_reg_13_, 0(_addr_reg_12_)
-	addi	$2, $2, 4
-# was:	addi	_addr_reg_12_, _addr_reg_12_, 4
-# 	ori	_arr_reg_17_,_letBind_10_,0
-	ori	$2, $0, 0
-# was:	ori	_nelem_reg_20_, $0, 0
-	lw	$17, 0($3)
-# was:	lw	_size_reg_16_, 0(_arr_reg_17_)
+# was:	sw	_tmp_reg_5_, 0(_addr_reg_4_)
+	addi	$3, $3, 4
+# was:	addi	_addr_reg_4_, _addr_reg_4_, 4
+	ori	$2, $0, 2
+# was:	ori	_tmp_reg_5_, $0, 2
+	sw	$2, 0($3)
+# was:	sw	_tmp_reg_5_, 0(_addr_reg_4_)
+	addi	$3, $3, 4
+# was:	addi	_addr_reg_4_, _addr_reg_4_, 4
+	ori	$2, $0, 3
+# was:	ori	_tmp_reg_5_, $0, 3
+	sw	$2, 0($3)
+# was:	sw	_tmp_reg_5_, 0(_addr_reg_4_)
+	addi	$3, $3, 4
+# was:	addi	_addr_reg_4_, _addr_reg_4_, 4
+# 	ori	_arr_reg_9_,_letBind_2_,0
+	ori	$8, $0, 0
+# was:	ori	_nelem_reg_12_, $0, 0
+	lw	$3, 0($6)
+# was:	lw	_size_reg_8_, 0(_arr_reg_9_)
+# dynalloc
+	ori	$2, $28, 0
+# was:	ori	_letBind_7_, $28, 0
+	sll	$4, $3, 2
+# was:	sll	_tmp_21_, _size_reg_8_, 2
+	addi	$4, $4, 4
+# was:	addi	_tmp_21_, _tmp_21_, 4
+	add	$28, $28, $4
+# was:	add	$28, $28, _tmp_21_
+	sw	$3, 0($2)
+# was:	sw	_size_reg_8_, 0(_letBind_7_)
+	addi	$4, $2, 4
+# was:	addi	_addr_reg_13_, _letBind_7_, 4
+	ori	$5, $0, 0
+# was:	ori	_i_reg_14_, $0, 0
+	addi	$6, $6, 4
+# was:	addi	_elem_reg_10_, _arr_reg_9_, 4
+_loop_beg_15_:
+	sub	$7, $5, $3
+# was:	sub	_tmp_reg_17_, _i_reg_14_, _size_reg_8_
+	bgez	$7, _loop_end_16_
+# was:	bgez	_tmp_reg_17_, _loop_end_16_
+	lw	$7, 0($6)
+# was:	lw	_res_reg_11_, 0(_elem_reg_10_)
+	addi	$6, $6, 4
+# was:	addi	_elem_reg_10_, _elem_reg_10_, 4
+# 	ori	_plus_L_19_,_nelem_reg_12_,0
+# 	ori	_plus_R_20_,_res_reg_11_,0
+	add	$8, $8, $7
+# was:	add	_fun_arg_res_18_, _plus_L_19_, _plus_R_20_
+# 	ori	_nelem_reg_12_,_fun_arg_res_18_,0
+	sw	$8, 0($4)
+# was:	sw	_nelem_reg_12_, 0(_addr_reg_13_)
+	addi	$4, $4, 4
+# was:	addi	_addr_reg_13_, _addr_reg_13_, 4
+	addi	$5, $5, 1
+# was:	addi	_i_reg_14_, _i_reg_14_, 1
+	j	_loop_beg_15_
+_loop_end_16_:
+# map
+# 	ori	_arr_reg_23_,_letBind_7_,0
+	lw	$17, 0($2)
+# was:	lw	_size_reg_22_, 0(_arr_reg_23_)
 # dynalloc
 	ori	$16, $28, 0
-# was:	ori	_letBind_15_, $28, 0
-	sll	$4, $17, 2
-# was:	sll	_tmp_27_, _size_reg_16_, 2
-	addi	$4, $4, 4
-# was:	addi	_tmp_27_, _tmp_27_, 4
-	add	$28, $28, $4
-# was:	add	$28, $28, _tmp_27_
-	sw	$17, 0($16)
-# was:	sw	_size_reg_16_, 0(_letBind_15_)
-	addi	$19, $16, 4
-# was:	addi	_addr_reg_21_, _letBind_15_, 4
-	ori	$18, $0, 0
-# was:	ori	_i_reg_22_, $0, 0
-	addi	$20, $3, 4
-# was:	addi	_elem_reg_18_, _arr_reg_17_, 4
-_loop_beg_23_:
-	sub	$3, $18, $17
-# was:	sub	_tmp_reg_25_, _i_reg_22_, _size_reg_16_
-	bgez	$3, _loop_end_24_
-# was:	bgez	_tmp_reg_25_, _loop_end_24_
-	lw	$3, 0($20)
-# was:	lw	_res_reg_19_, 0(_elem_reg_18_)
-	addi	$20, $20, 4
-# was:	addi	_elem_reg_18_, _elem_reg_18_, 4
-# 	ori	$2,_nelem_reg_20_,0
-# 	ori	$3,_res_reg_19_,0
-	jal	incr
-# was:	jal	incr, $2 $3
-# 	ori	_tmp_reg_26_,$2,0
-# 	ori	_nelem_reg_20_,_tmp_reg_26_,0
-	sw	$2, 0($19)
-# was:	sw	_nelem_reg_20_, 0(_addr_reg_21_)
-	addi	$19, $19, 4
-# was:	addi	_addr_reg_21_, _addr_reg_21_, 4
-	addi	$18, $18, 1
-# was:	addi	_i_reg_22_, _i_reg_22_, 1
-	j	_loop_beg_23_
-_loop_end_24_:
-# map
-	ori	$2, $16, 0
-# was:	ori	_arr_reg_29_, _letBind_15_, 0
-	lw	$16, 0($2)
-# was:	lw	_size_reg_28_, 0(_arr_reg_29_)
-# dynalloc
-	ori	$17, $28, 0
-# was:	ori	_mainres_9_, $28, 0
-	sll	$3, $16, 2
-# was:	sll	_tmp_38_, _size_reg_28_, 2
+# was:	ori	_mainres_1_, $28, 0
+	sll	$3, $17, 2
+# was:	sll	_tmp_33_, _size_reg_22_, 2
 	addi	$3, $3, 4
-# was:	addi	_tmp_38_, _tmp_38_, 4
+# was:	addi	_tmp_33_, _tmp_33_, 4
 	add	$28, $28, $3
-# was:	add	$28, $28, _tmp_38_
-	sw	$16, 0($17)
-# was:	sw	_size_reg_28_, 0(_mainres_9_)
-	addi	$18, $17, 4
-# was:	addi	_addr_reg_32_, _mainres_9_, 4
+# was:	add	$28, $28, _tmp_33_
+	sw	$17, 0($16)
+# was:	sw	_size_reg_22_, 0(_mainres_1_)
+	addi	$18, $16, 4
+# was:	addi	_addr_reg_26_, _mainres_1_, 4
 	ori	$19, $0, 0
-# was:	ori	_i_reg_33_, $0, 0
+# was:	ori	_i_reg_27_, $0, 0
 	addi	$20, $2, 4
-# was:	addi	_elem_reg_30_, _arr_reg_29_, 4
-_loop_beg_34_:
-	sub	$2, $19, $16
-# was:	sub	_tmp_reg_36_, _i_reg_33_, _size_reg_28_
-	bgez	$2, _loop_end_35_
-# was:	bgez	_tmp_reg_36_, _loop_end_35_
-	lw	$2, 0($20)
-# was:	lw	_res_reg_31_, 0(_elem_reg_30_)
+# was:	addi	_elem_reg_24_, _arr_reg_23_, 4
+_loop_beg_28_:
+	sub	$2, $19, $17
+# was:	sub	_tmp_reg_30_, _i_reg_27_, _size_reg_22_
+	bgez	$2, _loop_end_29_
+# was:	bgez	_tmp_reg_30_, _loop_end_29_
+	lw	$21, 0($20)
+# was:	lw	_res_reg_25_, 0(_elem_reg_24_)
 	addi	$20, $20, 4
-# was:	addi	_elem_reg_30_, _elem_reg_30_, 4
-# 	ori	$2,_res_reg_31_,0
-	jal	writeInt
-# was:	jal	writeInt, $2
-# 	ori	_tmp_reg_37_,$2,0
-# 	ori	_res_reg_31_,_tmp_reg_37_,0
-	sw	$2, 0($18)
-# was:	sw	_res_reg_31_, 0(_addr_reg_32_)
+# was:	addi	_elem_reg_24_, _elem_reg_24_, 4
+# 	ori	_tmp_32_,_res_reg_25_,0
+# 	ori	_fun_arg_res_31_,_tmp_32_,0
+	ori	$2, $21, 0
+# was:	ori	$2, _fun_arg_res_31_, 0
+	jal	putint
+# was:	jal	putint, $2
+# 	ori	_res_reg_25_,_fun_arg_res_31_,0
+	sw	$21, 0($18)
+# was:	sw	_res_reg_25_, 0(_addr_reg_26_)
 	addi	$18, $18, 4
-# was:	addi	_addr_reg_32_, _addr_reg_32_, 4
+# was:	addi	_addr_reg_26_, _addr_reg_26_, 4
 	addi	$19, $19, 1
-# was:	addi	_i_reg_33_, _i_reg_33_, 1
-	j	_loop_beg_34_
-_loop_end_35_:
-	ori	$2, $17, 0
-# was:	ori	$2, _mainres_9_, 0
-	addi	$29, $29, 28
+# was:	addi	_i_reg_27_, _i_reg_27_, 1
+	j	_loop_beg_28_
+_loop_end_29_:
+	ori	$2, $16, 0
+# was:	ori	$2, _mainres_1_, 0
+	addi	$29, $29, 32
+	lw	$21, -28($29)
 	lw	$20, -24($29)
 	lw	$19, -20($29)
 	lw	$18, -16($29)