39 lines
1.4 KiB
C
39 lines
1.4 KiB
C
/*
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Memory elements and IO devices
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Memory resizes dynamically to accomodate usage.
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IO Devices are located at addresses 0x1000000000 to 0x1FFFFFFF.
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Three devices are implemented:
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0x10000000 Input quadword from standard input
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0x10000001 Input pseudo-random quadword
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0x00000002 Output quadword to standard output
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*/
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#include "wires.h"
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struct memory;
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typedef struct memory *mem_p;
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mem_p memory_create();
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void memory_destroy(mem_p);
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void memory_read_from_file(mem_p, const char* filename);
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// set a tracefile for validation of memory writes and input/output
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void memory_tracefile(mem_p mem, const char* filename);
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// Read quadword. We use little endian byte-addressing and support unaligned access
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// If the address is to an input device, input will be performed instead of memory access
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val memory_read(mem_p, val address, bool enable);
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// Write quadword with new value at rising edge of clock.
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// There are no internal forwarding from write to read in same clock period
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// Little endian byte-addressing and unaligned access is supported
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// If the address is to an output device, output will be performed instead of memory access
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void memory_write(mem_p, val address, val value, bool wr_enable);
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// read 10 bytes unaligned, for instruction fetch
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void memory_read_into_buffer(mem_p, val address, val bytes[], bool enable);
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// parse argument vector and load it into simulated argv area
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void memory_load_argv(mem_p, int argc, char* argv[]);
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