✨
This commit is contained in:
NikolajDanger
@ -153,55 +153,51 @@ boo:
|
||||
sw $16, -8($29)
|
||||
addi $29, $29, -28
|
||||
# ori _param_a_29_,$2,0
|
||||
ori $4, $0, 5
|
||||
# was: ori _plus_L_33_, $0, 5
|
||||
ori $3, $0, 3
|
||||
# was: ori _plus_R_34_, $0, 3
|
||||
add $0, $4, $3
|
||||
# was: add _letBind_32_, _plus_L_33_, _plus_R_34_
|
||||
# ori _arr_reg_36_,_param_a_29_,0
|
||||
ori $0, $0, 8
|
||||
# was: ori _letBind_31_, $0, 8
|
||||
# ori _arr_reg_34_,_param_a_29_,0
|
||||
lw $17, 0($2)
|
||||
# was: lw _size_reg_35_, 0(_arr_reg_36_)
|
||||
# was: lw _size_reg_33_, 0(_arr_reg_34_)
|
||||
ori $16, $28, 0
|
||||
# was: ori _letBind_31_, $28, 0
|
||||
# was: ori _letBind_32_, $28, 0
|
||||
sll $3, $17, 2
|
||||
# was: sll _tmp_45_, _size_reg_35_, 2
|
||||
# was: sll _tmp_43_, _size_reg_33_, 2
|
||||
addi $3, $3, 4
|
||||
# was: addi _tmp_45_, _tmp_45_, 4
|
||||
# was: addi _tmp_43_, _tmp_43_, 4
|
||||
add $28, $28, $3
|
||||
# was: add $28, $28, _tmp_45_
|
||||
# was: add $28, $28, _tmp_43_
|
||||
sw $17, 0($16)
|
||||
# was: sw _size_reg_35_, 0(_letBind_31_)
|
||||
# was: sw _size_reg_33_, 0(_letBind_32_)
|
||||
addi $18, $16, 4
|
||||
# was: addi _addr_reg_39_, _letBind_31_, 4
|
||||
# was: addi _addr_reg_37_, _letBind_32_, 4
|
||||
ori $19, $0, 0
|
||||
# was: ori _i_reg_40_, $0, 0
|
||||
# was: ori _i_reg_38_, $0, 0
|
||||
addi $20, $2, 4
|
||||
# was: addi _elem_reg_37_, _arr_reg_36_, 4
|
||||
_loop_beg_41_:
|
||||
# was: addi _elem_reg_35_, _arr_reg_34_, 4
|
||||
_loop_beg_39_:
|
||||
sub $2, $19, $17
|
||||
# was: sub _tmp_reg_43_, _i_reg_40_, _size_reg_35_
|
||||
bgez $2, _loop_end_42_
|
||||
# was: bgez _tmp_reg_43_, _loop_end_42_
|
||||
# was: sub _tmp_reg_41_, _i_reg_38_, _size_reg_33_
|
||||
bgez $2, _loop_end_40_
|
||||
# was: bgez _tmp_reg_41_, _loop_end_40_
|
||||
lw $2, 0($20)
|
||||
# was: lw _res_reg_38_, 0(_elem_reg_37_)
|
||||
# was: lw _res_reg_36_, 0(_elem_reg_35_)
|
||||
addi $20, $20, 4
|
||||
# was: addi _elem_reg_37_, _elem_reg_37_, 4
|
||||
# ori $2,_res_reg_38_,0
|
||||
# was: addi _elem_reg_35_, _elem_reg_35_, 4
|
||||
# ori $2,_res_reg_36_,0
|
||||
jal plus5
|
||||
# was: jal plus5, $2
|
||||
# ori _tmp_reg_44_,$2,0
|
||||
# ori _res_reg_38_,_tmp_reg_44_,0
|
||||
# ori _tmp_reg_42_,$2,0
|
||||
# ori _res_reg_36_,_tmp_reg_42_,0
|
||||
sw $2, 0($18)
|
||||
# was: sw _res_reg_38_, 0(_addr_reg_39_)
|
||||
# was: sw _res_reg_36_, 0(_addr_reg_37_)
|
||||
addi $18, $18, 4
|
||||
# was: addi _addr_reg_39_, _addr_reg_39_, 4
|
||||
# was: addi _addr_reg_37_, _addr_reg_37_, 4
|
||||
addi $19, $19, 1
|
||||
# was: addi _i_reg_40_, _i_reg_40_, 1
|
||||
j _loop_beg_41_
|
||||
_loop_end_42_:
|
||||
# was: addi _i_reg_38_, _i_reg_38_, 1
|
||||
j _loop_beg_39_
|
||||
_loop_end_40_:
|
||||
ori $2, $16, 0
|
||||
# was: ori _boores_30_, _letBind_31_, 0
|
||||
# was: ori _boores_30_, _letBind_32_, 0
|
||||
# ori $2,_boores_30_,0
|
||||
addi $29, $29, 28
|
||||
lw $20, -24($29)
|
||||
@ -222,110 +218,110 @@ main:
|
||||
addi $29, $29, -28
|
||||
jal getint
|
||||
# was: jal getint, $2
|
||||
ori $3, $2, 0
|
||||
# was: ori _letBind_47_, $2, 0
|
||||
# ori _size_reg_49_,_letBind_47_,0
|
||||
bgez $3, _safe_lab_50_
|
||||
# was: bgez _size_reg_49_, _safe_lab_50_
|
||||
ori $5, $2, 0
|
||||
# was: ori _letBind_45_, $2, 0
|
||||
# ori _size_reg_47_,_letBind_45_,0
|
||||
bgez $5, _safe_lab_48_
|
||||
# was: bgez _size_reg_47_, _safe_lab_48_
|
||||
ori $5, $0, 15
|
||||
# was: ori $5, $0, 15
|
||||
la $6, _Msg_IllegalArraySize_
|
||||
# was: la $6, _Msg_IllegalArraySize_
|
||||
j _RuntimeError_
|
||||
_safe_lab_50_:
|
||||
ori $2, $28, 0
|
||||
# was: ori _letBind_48_, $28, 0
|
||||
sll $4, $3, 2
|
||||
# was: sll _tmp_56_, _size_reg_49_, 2
|
||||
addi $4, $4, 4
|
||||
# was: addi _tmp_56_, _tmp_56_, 4
|
||||
add $28, $28, $4
|
||||
# was: add $28, $28, _tmp_56_
|
||||
sw $3, 0($2)
|
||||
# was: sw _size_reg_49_, 0(_letBind_48_)
|
||||
addi $5, $2, 4
|
||||
# was: addi _addr_reg_51_, _letBind_48_, 4
|
||||
ori $6, $0, 0
|
||||
# was: ori _i_reg_52_, $0, 0
|
||||
_loop_beg_53_:
|
||||
sub $4, $6, $3
|
||||
# was: sub _tmp_reg_55_, _i_reg_52_, _size_reg_49_
|
||||
bgez $4, _loop_end_54_
|
||||
# was: bgez _tmp_reg_55_, _loop_end_54_
|
||||
sw $6, 0($5)
|
||||
# was: sw _i_reg_52_, 0(_addr_reg_51_)
|
||||
addi $5, $5, 4
|
||||
# was: addi _addr_reg_51_, _addr_reg_51_, 4
|
||||
addi $6, $6, 1
|
||||
# was: addi _i_reg_52_, _i_reg_52_, 1
|
||||
j _loop_beg_53_
|
||||
_loop_end_54_:
|
||||
# ori _plus_L_59_,_letBind_47_,0
|
||||
ori $4, $3, 0
|
||||
# was: ori _plus_R_60_, _letBind_47_, 0
|
||||
add $0, $3, $4
|
||||
_safe_lab_48_:
|
||||
ori $3, $28, 0
|
||||
# was: ori _letBind_46_, $28, 0
|
||||
sll $2, $5, 2
|
||||
# was: sll _tmp_54_, _size_reg_47_, 2
|
||||
addi $2, $2, 4
|
||||
# was: addi _tmp_54_, _tmp_54_, 4
|
||||
add $28, $28, $2
|
||||
# was: add $28, $28, _tmp_54_
|
||||
sw $5, 0($3)
|
||||
# was: sw _size_reg_47_, 0(_letBind_46_)
|
||||
addi $3, $3, 4
|
||||
# was: addi _addr_reg_49_, _letBind_46_, 4
|
||||
ori $4, $0, 0
|
||||
# was: ori _i_reg_50_, $0, 0
|
||||
_loop_beg_51_:
|
||||
sub $2, $4, $5
|
||||
# was: sub _tmp_reg_53_, _i_reg_50_, _size_reg_47_
|
||||
bgez $2, _loop_end_52_
|
||||
# was: bgez _tmp_reg_53_, _loop_end_52_
|
||||
sw $4, 0($3)
|
||||
# was: sw _i_reg_50_, 0(_addr_reg_49_)
|
||||
addi $3, $3, 4
|
||||
# was: addi _addr_reg_49_, _addr_reg_49_, 4
|
||||
addi $4, $4, 1
|
||||
# was: addi _i_reg_50_, _i_reg_50_, 1
|
||||
j _loop_beg_51_
|
||||
_loop_end_52_:
|
||||
# ori _plus_L_56_,_letBind_45_,0
|
||||
ori $2, $5, 0
|
||||
# was: ori _plus_R_57_, _letBind_45_, 0
|
||||
add $2, $5, $2
|
||||
# was: add _letBind_55_, _plus_L_56_, _plus_R_57_
|
||||
# ori _plus_L_61_,_letBind_45_,0
|
||||
ori $3, $5, 0
|
||||
# was: ori _plus_R_62_, _letBind_45_, 0
|
||||
add $3, $5, $3
|
||||
# was: add _plus_L_59_, _plus_L_61_, _plus_R_62_
|
||||
# ori _plus_R_60_,_letBind_45_,0
|
||||
add $0, $3, $5
|
||||
# was: add _letBind_58_, _plus_L_59_, _plus_R_60_
|
||||
ori $4, $3, 0
|
||||
# was: ori _plus_L_63_, _letBind_47_, 0
|
||||
# ori _plus_R_64_,_letBind_47_,0
|
||||
add $4, $4, $3
|
||||
# was: add _plus_L_61_, _plus_L_63_, _plus_R_64_
|
||||
# ori _plus_R_62_,_letBind_47_,0
|
||||
add $0, $4, $3
|
||||
# was: add _letBind_57_, _plus_L_61_, _plus_R_62_
|
||||
# ori _arg_66_,_letBind_48_,0
|
||||
# ori $2,_arg_66_,0
|
||||
# ori _arg_64_,_letBind_55_,0
|
||||
# ori $2,_arg_64_,0
|
||||
jal boo
|
||||
# was: jal boo, $2
|
||||
# ori _letBind_65_,$2,0
|
||||
# ori _arr_reg_69_,_letBind_65_,0
|
||||
lw $16, 0($2)
|
||||
# was: lw _size_reg_68_, 0(_arr_reg_69_)
|
||||
ori $17, $28, 0
|
||||
# was: ori _letBind_67_, $28, 0
|
||||
sll $3, $16, 2
|
||||
# was: sll _tmp_78_, _size_reg_68_, 2
|
||||
# ori _letBind_63_,$2,0
|
||||
# ori _arr_reg_67_,_letBind_63_,0
|
||||
lw $17, 0($2)
|
||||
# was: lw _size_reg_66_, 0(_arr_reg_67_)
|
||||
ori $16, $28, 0
|
||||
# was: ori _letBind_65_, $28, 0
|
||||
sll $3, $17, 2
|
||||
# was: sll _tmp_76_, _size_reg_66_, 2
|
||||
addi $3, $3, 4
|
||||
# was: addi _tmp_78_, _tmp_78_, 4
|
||||
# was: addi _tmp_76_, _tmp_76_, 4
|
||||
add $28, $28, $3
|
||||
# was: add $28, $28, _tmp_78_
|
||||
sw $16, 0($17)
|
||||
# was: sw _size_reg_68_, 0(_letBind_67_)
|
||||
addi $18, $17, 4
|
||||
# was: addi _addr_reg_72_, _letBind_67_, 4
|
||||
# was: add $28, $28, _tmp_76_
|
||||
sw $17, 0($16)
|
||||
# was: sw _size_reg_66_, 0(_letBind_65_)
|
||||
addi $18, $16, 4
|
||||
# was: addi _addr_reg_70_, _letBind_65_, 4
|
||||
ori $19, $0, 0
|
||||
# was: ori _i_reg_73_, $0, 0
|
||||
# was: ori _i_reg_71_, $0, 0
|
||||
addi $20, $2, 4
|
||||
# was: addi _elem_reg_70_, _arr_reg_69_, 4
|
||||
_loop_beg_74_:
|
||||
sub $2, $19, $16
|
||||
# was: sub _tmp_reg_76_, _i_reg_73_, _size_reg_68_
|
||||
bgez $2, _loop_end_75_
|
||||
# was: bgez _tmp_reg_76_, _loop_end_75_
|
||||
# was: addi _elem_reg_68_, _arr_reg_67_, 4
|
||||
_loop_beg_72_:
|
||||
sub $2, $19, $17
|
||||
# was: sub _tmp_reg_74_, _i_reg_71_, _size_reg_66_
|
||||
bgez $2, _loop_end_73_
|
||||
# was: bgez _tmp_reg_74_, _loop_end_73_
|
||||
lw $2, 0($20)
|
||||
# was: lw _res_reg_71_, 0(_elem_reg_70_)
|
||||
# was: lw _res_reg_69_, 0(_elem_reg_68_)
|
||||
addi $20, $20, 4
|
||||
# was: addi _elem_reg_70_, _elem_reg_70_, 4
|
||||
# ori $2,_res_reg_71_,0
|
||||
# was: addi _elem_reg_68_, _elem_reg_68_, 4
|
||||
# ori $2,_res_reg_69_,0
|
||||
jal mul2
|
||||
# was: jal mul2, $2
|
||||
# ori _tmp_reg_77_,$2,0
|
||||
# ori _res_reg_71_,_tmp_reg_77_,0
|
||||
# ori _tmp_reg_75_,$2,0
|
||||
# ori _res_reg_69_,_tmp_reg_75_,0
|
||||
sw $2, 0($18)
|
||||
# was: sw _res_reg_71_, 0(_addr_reg_72_)
|
||||
# was: sw _res_reg_69_, 0(_addr_reg_70_)
|
||||
addi $18, $18, 4
|
||||
# was: addi _addr_reg_72_, _addr_reg_72_, 4
|
||||
# was: addi _addr_reg_70_, _addr_reg_70_, 4
|
||||
addi $19, $19, 1
|
||||
# was: addi _i_reg_73_, _i_reg_73_, 1
|
||||
j _loop_beg_74_
|
||||
_loop_end_75_:
|
||||
ori $2, $17, 0
|
||||
# was: ori _arg_79_, _letBind_67_, 0
|
||||
# ori $2,_arg_79_,0
|
||||
# was: addi _i_reg_71_, _i_reg_71_, 1
|
||||
j _loop_beg_72_
|
||||
_loop_end_73_:
|
||||
ori $2, $16, 0
|
||||
# was: ori _arg_77_, _letBind_65_, 0
|
||||
# ori $2,_arg_77_,0
|
||||
jal write_int_arr
|
||||
# was: jal write_int_arr, $2
|
||||
# ori _mainres_46_,$2,0
|
||||
# ori $2,_mainres_46_,0
|
||||
# ori _mainres_44_,$2,0
|
||||
# ori $2,_mainres_44_,0
|
||||
addi $29, $29, 28
|
||||
lw $20, -24($29)
|
||||
lw $19, -20($29)
|
||||
|
||||
Reference in New Issue
Block a user