From bdfb4ec7c2d19512baaef02b71dc12d39ff455c3 Mon Sep 17 00:00:00 2001 From: Nikolaj Date: Fri, 17 Dec 2021 13:10:08 +0100 Subject: [PATCH] probably done? --- A5/main.c | 6 +----- A5/sim | Bin 63896 -> 63920 bytes A5/test_runs/test1.out | 12 ------------ A5/test_runs/test2.out | 11 +---------- A5/test_runs/test3.hex | 9 +++++++++ A5/test_runs/test3.out | 9 +++++++++ A5/test_runs/test3.sym | 1 + A5/test_runs/test3.trc | 16 ++++++++++++++++ A5/tests/test3.prime | 9 +++++++++ 9 files changed, 46 insertions(+), 27 deletions(-) create mode 100644 A5/test_runs/test3.hex create mode 100644 A5/test_runs/test3.out create mode 100644 A5/test_runs/test3.sym create mode 100644 A5/test_runs/test3.trc create mode 100644 A5/tests/test3.prime diff --git a/A5/main.c b/A5/main.c index 95e60e6..295571f 100644 --- a/A5/main.c +++ b/A5/main.c @@ -159,8 +159,6 @@ int main(int argc, char* argv[]) { bool is_store = (is_mem_access && pick_one(3,minor_op)); bool is_conditional = (is_cflow || is_imm_cbranch) && !(is(0xE, minor_op) || is(0xF, minor_op)); - // TODO 2021: Add additional control signals you may need below.... - // setting up operand fetch and register read and write for the datapath: bool use_imm = is_imm_movq | is_imm_arithmetic | is_imm_cbranch; val reg_read_dz = or(use_if(!is_leaq, reg_d), use_if(is_leaq, reg_z)); @@ -231,7 +229,7 @@ int main(int argc, char* argv[]) { // determine the next position of the program counter bool is_jump = is_cflow && (is(0xF,minor_op) || (is_conditional && !reduce_or(compute_result))); - val pc_next_if_not_control = use_if(!is_jump, pc_incremented); + val pc_next_if_not_control = use_if(!(is_jump || is_return), pc_incremented); val pc_next_if_jump = use_if(is_jump, target); val pc_next_if_return = use_if(is_return, reg_out_b); val pc_next = add(add(pc_next_if_not_control, pc_next_if_jump), pc_next_if_return); @@ -242,7 +240,6 @@ int main(int argc, char* argv[]) { /*** WRITE ***/ // choose result to write back to register - // TODO 2021: Add any additional results which need to be muxed in for writing to the destination register bool use_compute_result = !is_load && (use_agen || use_multiplier || use_shifter || use_direct || use_alu); val datapath_result = or(use_if(use_compute_result, compute_result), use_if(is_load, mem_out)); @@ -251,7 +248,6 @@ int main(int argc, char* argv[]) { reg_write(regs, reg_d, datapath_result, reg_wr_enable); // write to memory if needed - printf("%i\n",is_store); memory_write(mem, agen_result, reg_out_a, is_store); // update program counter diff --git a/A5/sim b/A5/sim index de17651e6ad2a70bc1e43bc9cee37d351455b308..354025628acab3cb2b866096dc019a9bca0afd33 100755 GIT binary patch delta 4369 zcmZ8k3s_Xu7Cvhp2qy33VF-+)C<4OZlMrDbJ! zR=&C>-s*~-P<#R91I;);xV?T*kZ(=BZbvX2s9==cz|4uQuFo5kJ&gHRLS@ zx+Fa1I&OdgQcp6S!a&&LEadrGavo>>R| zaf`ji@hFDNeBSN6Bt}tHLv60TFtt<2_vy!`|v42zkx4w0fSW zrBH8*mG@BN&~yV9q_kQJ6uOC@369qMY2ftWMAGnk!2xudw+Dxkg^vXf8>%(H$DxZ4 zB}ubL_VR@iq#DP~P(i4Wv*38?ktA8{`R_=Qq;`ZT!CLHOv78K-F@*?wVF|Q@BI>1uk1fVK52ZFCh&mnCJN)}kiUr= zyFaa={k$t|FxkXgVW&0Jl`F$1QxymG9!YQV^xkKwg%cwJkhuvFM*5PiXn(+KBVxNu z50rNyS1iiz>q=!-FL?)}xiP}nB?9U+`w^&1|57W9^5NjfSgPlY$N)OVuSOba8^4dX zop(fD44R{O&2LurlkboL#{roW9OHO%R1lrugOHzz=cBST{hd|R*>g|69+pnlp@Lw2 zQ?H~suYo-GR9gzxCZPQr9UEKFK$!3@2Oh0VmC8jXlHFrVa6Q+2Y!TQ(%h|A#E;BFpDnbkO2epU<5 zQjqC*$rAB&k6u{UJiVipt+8DY==HJLl)%5o22(Km_3cf4+1z(1_2Q+Fow=s3QImF& zvlF|rTfg(JEf+9(L1rEI=^xOsFi2A+Bq1cFVyFIVwZShbK~rjQV4b{3To!q@T4BC? zGSawekYB=Z#pHV|-dX-r&PkFzr6SK(A$cyH~CvJ@Q1-X{( zPdsGsn{gvNmMOie(|vq0uBXWa*LkfS=igDB=O1;JrgDFbJ1a@6F-t4rp?e&U4AJ=P zTA~BIFW%7ike@t@>aWuod6Bnn_EHv>fK__UcXtdxuVn)^*^IlXP``@Z2WQbJer51j z+Q$b5zeeTUGr{1$r*k_`eSVOnn-gKZowE}xG>=OY@(ezT#giSa__sV=Q=YAfl$+@u zrw@4{;Jee3bmDNP#eT*7{8&rgEw8E-ay8!P${|(?=lH~Kbe5+ieoAY&V^Y_!50Mun zsugi8lrM{R5t~*kNmZyY$+4G5B|Q@}QPC@Dn+=t`Bc!d_nYJWFS>sp^`>IfR#vtC1 zG}PUGN-hLklPJScd@U)QeA(L^7QDl!-FBt#<()jpvpvu#J1OQ&bDoE>y~!rNYJT>A zyT);!q0y!R?X3dgNSUo*3@*DAT=vHh#Q63m_xb&yuX{9mx0`+;yCo0w(6;XyAU>Cz zrs)|OFPnX}Up@+z@;QaK)t<^w$JCS9sodunE>@;2rM{ja!vx{3XYe29@#%#LAK+_g z9+zf6YtBrw-!ngNwm-3N50M#H$0{)=b%`riYrMV~^D^m%y)o-$-kQ-x z%*(i^ThtW?@W?qw|VZc!iNqPxrzAi~iU4=!$CNxUX(FQyY?0y5K z089b8x(UMPz)0W~U^;NZO-Y&wTmpO#*!h+ueFhx-t0a93eCoC&-2$cqJ9QLJ7eu^#zF0*ZZ+HP1U}lZRdLxUVYA~%aWag zS1M|8?%YcrR4!)Z?$9B8ZTTB%tXRD4f@aaj9@Q|^7Cl%ui(=dP=1YHp&F8RjI>9 z(Qx&HN}FvI2l}H*TW#c`5ri`eU8F5qoI`goxK35C$e|ISKdE$e4y9rf7gV|-hxQ7EmW>ng9#p$<^rQ0eg; zdLM&ts)mS_dU&5%h!)Y(iTRWeo z@{P5B$B%`Kb&0qXiq;wF2A8iJgs1K8b=~PC`>qeCTuxXY@AKqIp7w6_I6+Jfe zBihNyB`?ql-c&M(Ci6K+4SQ{jq3vwmXrM}dabukKUnf}IY`OUP#`XA-$0;8T_I`4J zo!VG&%}0$|dV}X}?L%Am6nyJBMBrBR~E| zL#_P#_7V6EHuRG$+GR^?vrHPra?RMakFmQ5s9bdsU73#689_}Ngepj(g+&K zn@iKl%C}0xsf_)0j;9~RSv!rsZr>omdR!+nc+8Oi@r#4AwRBQ6R*%q5ixxDxjwkd{ zGHlWh1kebD(I&LDE+Zgy^B`O%=)+`i8LSVH(RH)lpx`;ZzY}Gt>F=jEDvj=b`bfFK zWrv^Vjz@ZRIGZz1uh)LYaYqU$S3G)Tkq!Y)Iq?T#nDotRN)u0ivze$&obzpn4_04v z$shaKdFgEg%24l*h{V;WBAL1M*+_e1eQMydQg2w2;z5Simlhjc|aBs<;SMXPj{(+BE z_JOJ$rD}b-1%9g7?Q$y0Fypd+;7oP)9;)SL)p7ynUe3m`XuRx?{Iy*^hY~*hi$5jt z^NG76=fXIN{gpw2$(Nfd$Q9iPA22?~Di4>PF ztW51Q@%u8#Q=;ird|W~Efp&eBDVW-*sE}FMRnPs;nd9T$^L?y;ul=vR_FjAMwayu; z?`l`y)h_Ku!z&^$xt)GVP@dDG56#v*mt`(9PRVi!L9WsSrQaS~a8> z4ek1MaGlUg5G>^$cX+hVeSdv|AlMIB%F-Gw_CtHkaOBV>@MPZ}0fso3+0z;<_S|#e z>n-*=hc1q*eLwWK$0}4UsCrO4WNH?h{RY!PvCPjv)FN(t?jJ-pzU%*irdup~=>zz9 zKzrA4c&l@0pLB3_Ks(JvlgfM0PQDP3>^s{e2sgcyHT|Uwn82pM8v2^Y>VrJWa$D>t zEk8PBM~l!C#y#{MX#`q<$`oE(_sdiQI=WE@aj`y1N0)f}3+67i&Vo?fLJMkVdRfYK zaq)5tbq=>qz_PS9OPQi>SW85Q2ve--Bmn6yA@ph=PS#zCQB4>q$Q3sw9nn9zvCNzmU z@!imH!@3s`a{v}n`n~LCk1XWnm2ym2=a5hQ}R4a>O}`x)7!mEQ?7 z(LG)VIf5I)Mkd_XD={s#*!S;ofup^$aI7=RE=ywN1(u~fCFQ9c#as{`OcU4&nZcFe z!Aa3h^K7U2x+lIAb1x@3{29^}#9oE`U2F-jB6`4;#yC2{KN#Pl0`3(NM=?AR@;~C5 zi03r4kGFQ|OAEy2E+;h1BH~HPTAdiMCve`xX2>q_|>bNf9 zE}nwmwY|h0)7uZ>c5PO!PM!1S)LfJ#-XE7luk)k0Ufq`8#%Np@dH5Wx6K!0GI>)w- zXqW3cIEOlJ@ThowaO*EHE+5}AGI><~fn1CIs-?Kudv7;6yZ~MrUqHRMB|d}#*{f%F zisn8&Qz)Emke*!I)2K_iAW2KvNAJ%ALUgQ2I8QhDLP9rMFX~=gp-szIHcz>WvFGHN zP&A5d4ZbE3>`L9aIWZ_;$Qi5_)3lAVM7ea9gPf^zWQxIkR#5D>0kW$) z$53R1vXXwFy=R44%F|kK;#lu?r-gG>I&Mnx_conIP^%GE3#wANu9VyL&7(m)rthmR z+kV8MtW62vV|`yifePyv9=O$CnZoIyEBKouF=#Ch?`NSYyuM#?cn8JeX*}~z;k?tX z6x*(lQkrgaTK^G9hIRb|=nmKPx1vTQm^ES1*YO&i; z%XBLS$N}cIVXGG^hEJy(0XKVbF(pSeTIy{Gv$t97vl>g&nz1d7mU920$|&VfC&5gP z9*5fEJk&%#!CRSp5!~zz!wMY!TrnWUWBv)4%GDGL8^nzRBB>+0CwB>1=ljg2v>lh@ zeNb$Bpi$y2=a-XDxf%9*$wQOv4{|N#F;;ZHnicsF zN$2V)5~rrmciomfo?JUmau)_pn>t>clG8y~6oDN5w4ETl4%`haN4{SG-UL1XY8xdf z3`sNsH~_dEI0o3*BuR6Dfxk-9I^aQ+m0I9LRG}-tN}vnMKMg!;F!Fb>q;AEh_1>@bLu$irJfQ|&AV{^R7m#pUZ_d+XqWksw%A3x#jj&~IRYUVf1{A&bJ=ZFD6Qp4$jzJq z`5R9fWu%|E9Bp6T0{Jo@gB;GcAg8fMekk5tG5JQaat_+%{4V5Lu7LFBZy+6f5^^`U z!sZ_Pj}E0+ei1T>b0PcktkFiA%av%a=ADo?`8?!3z7IK(4F&QniI5?j2WjRHAiw8I z$Qa%U`8uD6T)_7sN3vl|D2?Gn$k#XzauI(3xq~amq*J5VG{)>f^ z2#QAN8leD{RM`okG+y2iL5S%14BZ^@nEtB2lb%d6ZE%kE?)I404{*}G!3L_n?{$C7 zW~=O*+Gl((!PlX4>Y7yN;Kd3pPM?0!lXiRcO3nY z!T1|hoo^)*Ty1lzMHR(X(!%;Xm0n;aH>lfHwZuxF!F7$QE(Gf;2s_nPR@-QiP7rph z>>?{If$P1hT52UPxT;lEyOoB(xK16r!$!MwNWH_VUTdS{pnp)+dK(Rduj8uPV51RG zPpIlS8=0Y=RMkcsKRpSvr#*ZAe>dyB5lRoLb`*&KdE$S zA!S0npsGs?DIG!lqN=M4X*)LaqN=Vdr1?-UscKareFx)fs#;x0_n=-^H(;@q*241* zmEBQDom^f0=DOrK$~u@P&P=1yh*Jn2ys#Ge1($}T;3L1J*Pv_RAjq*aBam)RLgA@dDMenS(c1s zUcRgoz5r{Mg;5-zTNX(VS;IZ(D93Sk>c*pZG-dKGHqsov#6$4OYg!(IcXs~r7s$kO zmXD`_+_Zc!1#!%ZL9~Zwu9!t{@{JV}@S`GUr5Qz`Vx^H<`MZ_9@z%e+GJ;OA->OI| z<$kM@e4i$$bG4s(^Sr_ZqUY)aqH0d996?KXZDns7$7dnk*n3SZeZ|RZ!s%c9#+pQ* zCmE~;`aVz@A1s_J!lhuv3>}mzq@`A-QqqQvgiOW z+7L_Gyko-~K2MX|IrN|y{lyUtN&MHwOneHZe3^&(_vx2OG=tB5nTl!}yr~40b;G7; z>cb~C4Wp~vwQ4ZFFlSUn(JTCURTdRM+i<`-l#@xkXO~{w zw)-6|9TSbUnc7r0LF3|nSQjIMYnZN!jD2;Xiu$=OT*0%tKqtyl^J0L`s5Bx1b&DAWmGEua)*1Bzp9G9X<7IXfhcN3~;(Z%~c*(b*?!)w#kHDt$^Ia`%il40Myu>04!@jkXzi)?Izd>evNL$zd8<9($z#S-J0u2}#uod6dJi z7UA`<{%TiT>BCpkaT$HC1tK9MuchPWynD@rlUWa0%_pzTrh#I{Z*?81gnj-nxz(!& zQ!i%xQK!|k`Ll0ZFXU`Sn_2Vcd0yPsA8+!*ZD!2qcHfMB&bV)OyL{WZsP{PM_t5_W DfScsE diff --git a/A5/test_runs/test1.out b/A5/test_runs/test1.out index 359d574..77e32a5 100644 --- a/A5/test_runs/test1.out +++ b/A5/test_runs/test1.out @@ -1,25 +1,13 @@ 1 0 -0 2 6 -0 3 c -0 4 12 -0 5 15 -0 6 17 -0 7 1d -0 8 1f -0 9 22 -0 10 24 -0 11 2a -0 12 2c -0 Done diff --git a/A5/test_runs/test2.out b/A5/test_runs/test2.out index 9101694..7d92549 100644 --- a/A5/test_runs/test2.out +++ b/A5/test_runs/test2.out @@ -1,18 +1,9 @@ 1 0 -0 2 6 -1 3 8 -0 4 b -0 5 25 -0 6 3d -0 7 3f -0 8 45 -0 - -- value mismatch, access 'P' 0 - -- with value 47, but tracefile expected 0 +Done diff --git a/A5/test_runs/test3.hex b/A5/test_runs/test3.hex new file mode 100644 index 0000000..d7412c2 --- /dev/null +++ b/A5/test_runs/test3.hex @@ -0,0 +1,9 @@ +00000000 : # test: +00000000 : 645064000000 # movq $100, %rsi +00000006 : 64000a000000 # movq $10, %rax +0000000c : 3905 # movq %rax, (%rsi) +0000000e : 500002000000 # addq $2, %rax +00000014 : 3105 # movq (%rsi), %rax +00000016 : 500002000000 # addq $2, %rax +0000001c : 3905 # movq %rax, (%rsi) +0000001e : 0000 # stop diff --git a/A5/test_runs/test3.out b/A5/test_runs/test3.out new file mode 100644 index 0000000..e36cac6 --- /dev/null +++ b/A5/test_runs/test3.out @@ -0,0 +1,9 @@ +1 0 +2 6 +3 c +4 e +5 14 +6 16 +7 1c +8 1e +Done diff --git a/A5/test_runs/test3.sym b/A5/test_runs/test3.sym new file mode 100644 index 0000000..7791d92 --- /dev/null +++ b/A5/test_runs/test3.sym @@ -0,0 +1 @@ +test : 00000000 diff --git a/A5/test_runs/test3.trc b/A5/test_runs/test3.trc new file mode 100644 index 0000000..fbcae64 --- /dev/null +++ b/A5/test_runs/test3.trc @@ -0,0 +1,16 @@ +P 0 0 +R 5 64 +P 0 6 +R 0 a +P 0 c +M 64 a +P 0 e +R 0 c +P 0 14 +R 0 a +P 0 16 +R 0 c +P 0 1c +M 64 c +P 0 1e +P 0 20 diff --git a/A5/tests/test3.prime b/A5/tests/test3.prime new file mode 100644 index 0000000..9595567 --- /dev/null +++ b/A5/tests/test3.prime @@ -0,0 +1,9 @@ +test: + movq $100, %rsi + movq $10, %rax + movq %rax, (%rsi) + addq $2, %rax + movq (%rsi), %rax + addq $2, %rax + movq %rax, (%rsi) +stop \ No newline at end of file